WG82577LM S LGWS Intel, WG82577LM S LGWS Datasheet - Page 92

• Manufacturer Part Number: WG82577LM S LGWS
• Manufacturer: Intel

Specifications of WG82577LM S LGWS

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Table 68.
85
Wake Up Filter Control – WUFC PHY Address 01, Page 800, Register 2
This register is used to enable each of the pre-defined and flexible filters for wake up
support. A value of 1b means the filter is turned on, and a value of 0b means the filter
is turned off.
RW
RW
RW
RW
RW
RW
RW
RW
RO
RW
RW
RW
RW
RW
RW
RW
Attribute
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Bit(s)
0b
0b
0b
0b
0b
0b
0b
0b
0b
0
0b
0b
0b
0b
0b
0b
Initial
Value
LNKC
Link status change wake up enable.
MAG
Magic packet wake up enable.
EX
Directed exact wake up enable.
MC
Directed multicast wake up enable.
BC
Broadcast wake up enable.
Reserved
IPV4
Directed IPv4 packet wake up enable.
IPV6
Directed IPv6 packet wake up enable.
Reserved.
FLX4
Flexible filter 3 enable.
FLX5
Flexible filter 3 enable.
NoTCO
Ignore TCO packets for host wake up. If the NoTCO bit is set, then any packet
that passes the manageability packet filtering does not cause a host wake up
event even if it passes one of the host wake up filters.
FLX0
Flexible filter 0 enable
FLX1
Flexible filter 1 enable
FLX2
Flexible filter 2 enable
FLX3
Flexible filter 3 enable
82577 GbE PHY—Programmer’s Visible State
Description