WG82577LM S LGWS Intel, WG82577LM S LGWS Datasheet - Page 46

• Manufacturer Part Number: WG82577LM S LGWS
• Manufacturer: Intel

Specifications of WG82577LM S LGWS

• Lead Free Status / RoHS Status: Supplier Unconfirmed

7.4.1.3.1.1
7.4.1.3.1.2
7.4.1.3.1.3
39
The explanation of each filter includes a table showing which bytes at which offsets are
compared to determine if the packet passes the filter. Note that both VLAN frames and
LLC/Snap can increase the given offsets if they are present.
Directed Exact Packet
The 82577 generates a wake up event after receiving any packet whose destination
address matches one of the seven valid programmed receive addresses if the Directed
Exact Wake Up Enable bit (bit 2) is set in the WUFC register.
Directed Multicast Packet
For multicast packets, the upper bits of the incoming packet’s destination address
indexes a bit vector and the Multicast Table Array indicates whether to accept the
packet. If the Directed Multicast Wake Up Enable bit (bit 3) is set in the WUFC register
and the indexed bit in the vector is one, the 82577 generates a wake up event. The
exact bits used in the comparison are programmed by software in the Multicast Offset
field (bits 4:3) of the RCTL register.
Broadcast
If the Broadcast Wake Up Enable bit (bit 4) in the WUFC register is set, the 82577
generates a wake up event when it receives a broadcast packet.
Offset
0
Offset
0
Offset
0
# of Bytes
6
# of Bytes
6
# of Bytes
6
Field
Destination Address
Field
Destination Address
Field
Destination Address
Value
Action
Compare
Value
Value
FF*6
Comment
Match any pre-programmed address as
defined in the receive address
Action
Compare
82577 GbE PHY—Device Functionality
Action
Compare
Comment
See previous paragraph.
Comment