WG82577LM S LGWS Intel, WG82577LM S LGWS Datasheet - Page 87

• Manufacturer Part Number: WG82577LM S LGWS
• Manufacturer: Intel

Specifications of WG82577LM S LGWS

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Programmer’s Visible State—82577 GbE PHY
Table 62.
Table 63.
Table 64.
SMBus Address PHY Address 01, Page 0, Register 26
1. This register is reset only on internal power on reset.
Shadow Receive Address Low0 – SRAL0 PHY Address 01, Page 0, Registers
27-28
Shadow Receive Address High0 – RAH0 PHY Address 01, Page 0, Registers 29
Reserved
SMB fragments size
APM Enable
PEC Enable
SMBus Frequency
SMBus Address Valid
SMBus Address
RW
RW
RW
RO
RW
Attribute
Attribute
Name
15:0
17:16
30:18
31
31:0
Bit(s)
Bit(s)
X
X
0x00
See
Desc.
Initial
X
Value
Initial
Value
Receive Address High (RAH)
The upper 16 bits of the 48-bit Ethernet address n (n=0, 1…6). RAH 0 is loaded
from word 0x2 in the NVM.
Address Select (ASEL)
Selects how the address is to be used and is decoded as follows:
00b = Destination address (must be set to this in normal mode).
01b = Source address.
10b = Reserved.
11b = Reserved.
Reserved, reads as 0b and ignored on writes.
Address valid (AV)
Cleared after master reset. If the NVM is present, the Address Valid field of
Receive Address Register 0 is set to one after a software or PCI reset or NVM
read.
This bit is cleared by a master (software) reset.
Receive Address Low (RAL)
The lower 32 bits of the 48-bit Ethernet address n (n=0, 1…6). RAL 0 is loaded
from words 0x0 and 0x1 in the NVM.
0x00
0b
0b
1b
0b
0b
0x00
Default
15:12
11
10
9
8
7
6:0
Bits
Reserved
Select SMBus Fragments Size
When set to 1b, the fragment size is 64 bytes,
otherwise 32 bytes.
APM WoL enable.
Defines if the 82577 supports PEC on the
SMBus.
0b = 100 KHz.
1b = Reserved
0b = Address not valid.
1b = SMBus address valid.
This bit is written by the MAC when the SMBus
Address field is updated. The 82577 cannot
send SMBus transactions to the MAC unless
this bit is set.
This is the MAC SMBus address. The 82577
uses it for master functionality.
Description
Description
Description
1
RW
RW
RW
RW
RW
RO
RW
Type
80