NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 158

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

Table 71.
5.11.8
5.11.8.1 THRM# Signal
5.11.8.2 THRM# Initiated Passive Cooling
Intel
DS
158
®
6300ESB I/O Controller Hub
Note: THRM# assertion will not cause a TCO event message in S1-M, S3, or S4. The level of
Transitions Due to Power Failure
Thermal Management
The Intel
the system.
The THRM# signal is used as a status input for a thermal sensor. Based on the THRM#
signal going active, the Intel
SCI_EN).
When the THRM_POL bit is set low, when the THRM# signal goes low, the THRM_STS
bit will be set. This is an indicator that the thermal threshold has been exceeded. When
the THRM_EN bit is set, then when THRM_STS goes active, either an SMI# or SCI will
be generated (depending on the SCI_EN bit being set).
The power management software (BIOS or ACPI) may then take measures to start
reducing the temperature. Examples include shutting off unwanted subsystems, or
halting the processor.
By setting the THRM_POL bit to high, another SMI# or SCI may optionally be generated
when the THRM# signal goes back high. This allows the software (BIOS or ACPI) to
turn off the cooling methods.
the signal will not be reported in the heartbeat message.
When the THRM# signal remains active for some time greater than two seconds and
the Intel
an auto-throttling mode, in which it provides a duty cycle on the STPCLK# signal. This
will reduce the overall power consumption by the system, and should cool the system.
The intended result of the cooling is that the THRM# signal should go back inactive.
For all programmed values (001–111), THRM# going active will result in STPCLK#
active for a minimum time of 12.5% and a maximum of 87.5%. The period is 1024 PCI
clocks. Thus, the STPCLK# signal may be active for as little as 128 PCI clocks or as
much as 896 PCI clocks. The actual slowdown (and cooling) of the processor will
depend on the instruction stream, because the processor is allowed to finish the
current instruction. Furthermore, the Intel
cycle before starting the count of the time the STPCLK# signal is active.
When THRM# goes inactive, the throttling will stop.
State at Power Failure
S0, S1, S3
®
®
6300ESB ICH is in the S0/G0/C0 state, then the Intel
6300ESB ICH has mechanisms to assist with managing thermal problems in
S4
S5
®
AFTERG3_EN bit
6300ESB ICH generates an SMI# or SCI (depending on
1
0
1
0
1
0
®
6300ESB ICH waits for the STOP-GRANT
Transition When Power Returns
Order Number: 300641-004US
®
6300ESB ICH enters
S5
S0
S4
S0
S5
S0
Intel
®
6300ESB ICH—5
November 2007