NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 639

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

17—Intel
17.1.13 Offset 50 - 51h: XID—PCI-X Identifiers Register
Table 570. Offset 50 - 51h: XID—PCI-X Identifiers Register (APIC1—D29:F5)
17.1.14 Offset 52h: XSR—PCI-X Status Register (APIC1—
Table 571. Offset 52h: XSR—PCI-X Status Register (APIC1—D29:F5)
November 2007
Order Number: 300641-004US
15:8
31:2
15:8
Bits
Bits
Default Value:
Default Value:
7:0
7:3
2:0
20
19
18
17
16
1
Lockable:
Lockable:
Device:
Device:
®
Offset:
Offset:
XNPTR: Next Pointer
6300ESB ICH
XCID: Capability ID
Device Complexity
133 MHz Capable
Function Number
Unexpected Split
Split Completion
Device Number
64-bit Device
Bus Number
Completion
(APIC1—D29:F5)
D29:F5)
Discarded
Reserved
29
50-51h
0007h
No
Name
29
52h
000300EDh
No
Name
Points to the next capabilities list pointer (empty).
Capabilities ID indicates PCI-X (07h).
Reserved.
Hardwired to logic ’0’ to indicate that this is a simple device.
This device will never see an unexpected split completion, as
it never generates any master cycles besides posted writes
for MSI.
This device does not support Split Completion.
Hardwired to logic ’0’ to indicate this device is not 133 MHz
capable.
Hardwired to logic ’1’ to indicate that this is a 64-bit device.
Indicates the bus number of the bus segment for this device.
This value will match the primary bus number field from the
attached bridge.
Reflects the device number that has been hard-coded for the
device. This number will be 1Dh (29) for APIC1.
Reflects the function number for the device.
Power Well:
Power Well:
Description
Description
Attribute:
Attribute:
Function:
Function:
Size:
Size:
5
Read-Only
16-bit
Core
5
Read-Only
32-bit
Core
Intel
®
6300ESB I/O Controller Hub
Access
Access
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
639
DS