NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 217
NHE6300ESB S L7XJ
Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet
1.NHE6300ESB_S_L7XJ.pdf
(848 pages)
Specifications of NHE6300ESB S L7XJ
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5—Intel
5.17.9
Table 105. USB Legacy Keyboard/Mouse Control Register Bit Implementation
November 2007
Order Number: 300641-004US
Bit
15
13
12
11
10
#
9
8
7
6
5
SMI Caused by
End of Pass-
Through
PCI Interrupt
Enable
SMI Caused by
USB Interrupt
SMI Caused by
Port 64 Write
SMI Caused by
Port 64 Read
SMI Caused by
Port 60 Write
SMI Caused by
Port 60 Read
SMI at End of
Pass-Through
Enable
Pass Through
State
A20Gate Pass-
Through Enable
®
6300ESB ICH
Bit Name
Typically when a USB keyboard is plugged into the system, and a standard keyboard is
not, the system may not boot, and DOS legacy software will not run, because the
keyboard will not be identified. In an Intel
will allow the USB keyboard and DOS legacy software to run. Port 60/64 emulation
registers may be enabled by BIOS typically in a pre-OS environment and may be
disabled during run time.
The Intel
accesses that typically go to the keyboard controller and put the expected data from
the USB keyboard into ports 60/64.
The following table summarizes the implementation of the bits in the USB Legacy
Keyboard/Mouse Control Registers.
(Sheet 1 of 2)
USB Legacy Keyboard Operation
®
Logically 1 bit
for all
controllers
Independent
enable
Independent
status
Logically 1 bit
for all
controllers
Logically 1 bit
for all
controllers
Logically 1 bit
for all
controllers
Logically 1 bit
for all
controllers
Separate
enables ORed
together
Logically 1 bit
for all
controllers
ORed together
to enable the
pass-through
state machine
6300ESB ICH implements a series of trapping operations that will snoop
Summary
Note this bit in all host controllers will be set at the same time and
cleared at the same time. It is cleared whenever software writes a
one to this bit in any of the three host controllers. This bit may either
be implemented separately for each controller or shared and aliased.
Each bit provides individual host control.
Individual status bits for each controller.
Note this bit in all host controllers will be set at the same time and
cleared at the same time. It is cleared whenever software writes a
one to this bit in any of the three host controllers. This bit may either
be implemented separately for each controller or shared and aliased.
Note this bit in all host controllers will be set at the same time and
cleared at the same time. It is cleared whenever software writes a
one to this bit in any of the three host controllers. This bit may either
be implemented separately for each controller or shared and aliased.
Note this bit in all host controllers will be set at the same time and
cleared at the same time. It is cleared whenever software writes a
one to this bit in any of the three host controllers. This bit may either
be implemented separately for each controller or shared and aliased.
Note this bit in all host controllers will be set at the same time and
cleared at the same time. It is cleared whenever software writes a
one to this bit in any of the three host controllers. This bit may either
be implemented separately for each controller or shared and aliased.
This bit enables the generation of the SMI based on bit 15 within the
same function. When bit 15 is implemented as a shared/aliased bit
across all functions, the bit 7’s from all three controllers are ORed
together and used to enable the SMI based on bit 15.
This bit in all host controllers reflects the state of the Pass-Through
state machine. Software may force this bit to zero by clearing the
A20Gate Pass-Through Enable (bit 5) in all of the host controllers.
When any of these bits in the three host controllers is set, the Intel
6300ESB ICH will enable the Legacy Keyboard A20Gate Pass-through
sequence. This prevents the SMI status bits (11:8) from asserting in
all three controllers when the specific sequence of I/O cycles is
observed.
®
6300ESB ICH system Port 60/64 emulation
Details
Intel
®
6300ESB I/O Controller Hub
217
DS
®
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