NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 160

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

Table 72.
5.11.9.2 RI# - Ring Indicate
Intel
DS
160
®
6300ESB I/O Controller Hub
Note: The four second PWRBTN# assertion should only be used when a system lock-up has
Transitions Due to Power Button
Power Button Override Function
When PWRBTN# is observed active for at least four consecutive seconds, then the state
machine should unconditionally transition to the G2/S5 state, regardless of present
state (S0–S4). In this case, the transition to the G2/S5 state should not depend on any
particular response from the processor (such as a Stop-Grant cycle), nor any similar
dependency from any other subsystem.
A power button override will force a transition to S5 even when PWROK is not active
The PWRBTN# status is readable to check when the button is currently being pressed
or has been released. The status is taken after the debounce, and is readable through
the PWRBTN_LVL bit.
occurred. The four second timer starts counting when the Intel
S0 state. When the PWRBTN# signal is asserted and held active when the system is in
a suspend state (S1–S5), the assertion will cause a wake event. Once the system has
resumed to the S0 state, the four second timer will start.
Sleep Button
The ACPI specification defines an optional Sleep button. It differs from the power
button in that it only is a request to go from S0 to S1–S4 (not S5). Also, in an S5 state,
the Power Button may wake the system, but the Sleep Button cannot.
Although the Intel
Sleep Button, one of the GPIO signals may be used to create a “Control Method” Sleep
Button. See the ACPI specification for implementation details.
The Ring Indicator may cause a wake event (when enabled) from the S1–S5 states.
Table 73
in the G0/S0/Cx states, the Intel
RI# active, and the interrupt will be set up as a break event.
Present
S1-S5
S0-S4
State
S0/Cx
G3
shows when the wake event is generated or ignored in different states. When
PWRBTN# goes low
PWRBTN# goes low
PWRBTN# pressed
PWRBTN# held low
for at least four
consecutive seconds
®
Event
6300ESB ICH does not include a specific signal designated as a
®
SMI# or SCI generated
(depending on SCI_EN)
Wake Event. Transitions to
S0 state.
None
Unconditional transition to
S5 state.
6300ESB ICH will generate an interrupt based on
Transition/Action
Software will typically initiate
a Sleep state.
Standard wakeup
No effect since no power.
Not latched nor detected.
No dependence on processor
(such as Stop-Grant cycles)
or any other subsystem.
®
Order Number: 300641-004US
6300ESB ICH is in a
Intel
Comment
®
6300ESB ICH—5
November 2007
.