NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 55

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

3—Intel
Signal Description
3.1
Table 3.
November 2007
Order Number: 300641-004US
®
6300ESB ICH
This section provides a detailed description of each signal. The signals are arranged in
functional groups according to their associated interface.
The “#” symbol at the end of the signal name indicates that the active, or asserted
state occurs when the signal is at a low voltage level. When “#” is not present, the
signal is asserted when at the high voltage level.
The following notations are used to describe the signal type:
I
O
OD
I/O
Hub Interface to Host Controller
Hub Interface Signals
HI[11:0]
HI_STBS
HI_STBF
HICOMP
HICLK
Name
Input Pin
Output Pin
Open Drain Output Pin
Bi-directional Input/Output Pin
Type
I/O
I/O
I/O
I/O
I
Hub Interface Signals
Hub Interface Strobe Second: One of two differential strobe
signals used to transmit and receive data through the Hub Interface.
Hub Interface 1.5 mode this signal is not differential and is the second
of the two strobe signals.
Hub Interface Strobe First: One of two differential strobe signals
used to transmit and receive data through the Hub Interface.
Hub Interface 1.5 mode this signal is not differential and is the first of
the two strobe signals.
Hub Interface Compensation: Used for Hub Interface buffer
compensation.
NOTE: The Intel
Hub Interface Clock: 66 MHz clock input for Hub Interface. It is also
used for some other internal units. This clock will stop during S3-S5
states.
ZCOMP mode.
®
6300ESB ICH will only support RCOMP, not the
Description
Intel
®
6300ESB I/O Controller Hub
3
DS
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