NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 736
NHE6300ESB S L7XJ
Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet
1.NHE6300ESB_S_L7XJ.pdf
(848 pages)
Specifications of NHE6300ESB S L7XJ
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Table 659. Logical Device 7 (Port Emulation)
Intel
DS
736
®
6300ESB I/O Controller Hub
Enable
Default = 00h
I/O Base Address
Default = 60h
Primary Interrupt
Select
Default = 00h
60-61h
(R/W)
(R/W)
30h
70h
(R)
Bits[7:1] Reserved, set to ’0’.
Bit[0]
1 = Enable the logical device currently selected through
the Logical Device # register.
0 = Logical device currently selected is inactive.
Registers 60h (MSB) and 61h (LSB) set the base
address for the device.
Decode is on 8 Byte boundaries so both 60h and 64h are
captured by the single value of 60h in this space.
NOTE: This device must ignore accesses to unsupported
Bits[3:0] select which interrupt level is used for the
primary Interrupt for Port 60h, Software Note: Do not
set the interrupt to the same value as the port 64h
interrupt.
Bits[7:4] select which interrupt level is used for the
primary Interrupt for Port 64h, Software Note: Do not
set the interrupt to the same value as the port 60h
interrupt.
00 = No interrupt selected
01 = IRQ1
02 = IRQ2
03 = IRQ3
04 = IRQ4
05 = IRQ5
06 = IRQ6
07 = IRQ7
08 = IRQ8
09 = IRQ9
0A = IRQ10
0B = IRQ11
0C = IRQ12
0D = IRQ13
0E = IRQ14
0F = IRQ15
NOTE: An Interrupt is activated by enabling this device
bytes (specifically 61-63h and 65-67h)
(offset 30h),setting this register to a non-zero
value, and writing to the appropriate I/O address
(60h or 64h).
Order Number: 300641-004US
Intel
®
6300ESB ICH—19
November 2007
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