ISP1362EE ST-Ericsson Inc, ISP1362EE Datasheet - Page 37

• Manufacturer Part Number: ISP1362EE
• Description: IC USB CTRL SNGL CHIP 64TFBGA
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1362EE

• Controller Type: USB 2.0 Controller
• Interface: Parallel/Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -

NXP Semiconductors
ISP1362_5
Product data sheet
10.4.3 HNP implementation and OTG state machine
The OTG state machine is the software behind all the OTG functionality. It is implemented
in the microprocessor system that is connected to the ISP1362. The ISP1362 provides all
input status, the output control and timers to fully support the state machine transitions in
Figure 18
These registers include:
The OTG interrupt is generated on the INT1 pin. It is shared with the Host Controller
interrupt. To enable the OTG interrupt, perform these steps:
Fig 19. Dual-role B-device state diagram
•
•
•
•
•
OtgControl register: provides control to V
line pull-up or pull-down, SRP detection, and so on.
OtgStatus register: provides status detection on V
V
OtgInterrupt register: provides interrupts for status change in OtgStatus register bits
and the OtgTimer time-out event.
OtgInterruptEnable register: provides interrupt mask for OtgInterrupt register bits.
OtgTimer register: provides 0.01 ms base programmable timer for use in the OTG
state machine.
BUS
chrg_vbus/
loc_conn/
START
loc_sof
session valid, session end, overcurrent, bus status.
b_host
and
a_conn
Figure
b_wait_acon
b_sess_vld/
chrg_vbus/
loc_conn/
loc_sof/
id/ |
19.
Rev. 05 — 8 May 2007
b_sess_vld/
id/ |
b_ase0_brst_tmout
a_bus_resume |
a_bus_suspend
b_bus_req/ |
b_bus_req &
chrg_vbus/
b_hnp_en &
drv_vbus/
loc_conn/
loc_sof/
a_conn/
b_idle
b_sess_vld/
BUS
id/ |
driving, charging or discharging, data
BUS
Single-chip USB OTG Controller
and data lines including ID,
id/
b_srp_done
b_sess_end &
id/ |
b_bus_req &
b_se0_srp
b_peripheral
chrg_vbus/
b_sess_vld
loc_conn
loc_sof/
© NXP B.V. 2007. All rights reserved.
pulse chrg_vbus
ISP1362
pulse loc_conn
chrg_vbus/
drv_vbus/
loc_conn/
b_srp_init
loc_sof/
loc_sof/
a_idle
004aaa078
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