ISP1362EE ST-Ericsson Inc, ISP1362EE Datasheet - Page 91

• Manufacturer Part Number: ISP1362EE
• Description: IC USB CTRL SNGL CHIP 64TFBGA
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1362EE

• Controller Type: USB 2.0 Controller
• Interface: Parallel/Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -

NXP Semiconductors
Table 65.
ISP1362_5
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcDMAConfiguration register: bit allocation
DMACounter
14.4.2 HcDMAConfiguration register (R/W: 21h/A1h)
Enable
R/W
15
7
0
-
-
Table 64.
Table 65
Code (Hex): 21 — read
Code (Hex): A1 — write
Table 66.
Bit
5
4 to 3
2
1
0
Bit
15 to 8
7
6 to 5
R/W
14
6
0
Symbol
DREQOutputPolarity
DataBusWidth[1:0]
InterruptOutputPolarity
InterruptPinTrigger
InterruptPinEnable
-
-
BurstLen[1:0]
Symbol
-
DMACounterEnable
BurstLen[1:0]
contains the bit allocation of the HcDMAConfiguration register.
HcHardwareConfiguration register: bit description
HcDMAConfiguration register: bit description
R/W
13
5
0
-
-
Rev. 05 — 8 May 2007
Enable
DMA
R/W
12
Description
reserved
0 — reserved
1 — DMA counter is enabled. Once the counter is enabled, the
HCD must initialize the HcTransferCounter register to a
non-zero value for DREQ to be raised after the DMAEnable bit
is set to HIGH.
00 — single-cycle burst DMA
01 — 4-cycle burst DMA
10 — 8-cycle burst DMA
11 — reserved
I/O bus with 32-bit data path width supports only single and
four cycle DMA burst.
4
0
-
-
Description
0 — DREQ1 is active LOW
1 — DREQ1 is active HIGH
01 — microprocessor interface data bus width is 16 bits
Others — reserved
0 — INT1 interrupt is active LOW; power-up value
1 — INT1 interrupt is active HIGH
0 — INT1 interrupt is level-triggered; power-up value
1 — INT1 interrupt is edge-triggered
0 — power-up value
1 — global interrupt pin INT1 is enabled; this bit should be
used with the Hc PInterruptEnable register to enable
pin INT1
reserved
R/W
11
3
0
-
-
Buffer_Type_Select[2:0]
Single-chip USB OTG Controller
R/W
10
2
0
-
-
…continued
R/W
9
1
0
-
-
© NXP B.V. 2007. All rights reserved.
ISP1362
WriteSelect
DMARead
R/W
90 of 152
8
0
0
-
-