ISP1362EE ST-Ericsson Inc, ISP1362EE Datasheet - Page 88

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ISP1362EE

Manufacturer Part Number
ISP1362EE
Description
IC USB CTRL SNGL CHIP 64TFBGA
Manufacturer
ST-Ericsson Inc
Datasheet

Specifications of ISP1362EE

Controller Type
USB 2.0 Controller
Interface
Parallel/Serial
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-

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NXP Semiconductors
ISP1362_5
Product data sheet
Table 62.
Bit
4
3
2
HcRhPortStatus[1:2] register: bit description
Symbol
PRS
POCI
PSS
Rev. 05 — 8 May 2007
Description
On read PortResetStatus: When this bit is set by a write to
SetPortReset, port reset signaling is asserted. When reset is
completed, this bit is cleared when PortResetStatusChange (PRSC) is
set. This bit cannot be set if CurrentConnectStatus (CCS) is cleared.
0 — port reset signal is not active
1 — port reset signal is active
On write SetPortReset: The HCD sets the port reset signaling by
writing logic 1 to this bit. Writing logic 0 has no effect. If
CurrentConnectStatus (CCS) is cleared, this write does not set
PortResetStatus (PRS) but instead sets ConnectStatusChange
(CSC). This informs the driver that it attempted to reset a
disconnected port.
On read PortOverCurrentIndicator: This bit is valid only when the
root hub is configured in such a way that overcurrent conditions are
reported on a per-port basis. If per-port overcurrent reporting is not
supported, this bit is set to logic 0. If cleared, all power operations are
normal for this port. If set, an overcurrent condition exists on this port.
This bit always reflects the overcurrent input signal.
0 — no overcurrent condition
1 — overcurrent condition detected
On write ClearSuspendStatus: The HCD writes logic 1 to initiate a
resume. Writing logic 0 has no effect. A resume is initiated only if
PortSuspendStatus (PSS) is set.
On read PortSuspendStatus: This bit indicates whether the port is
suspended or is in the resume sequence. It is set by a
PortSuspendStatus write and cleared when
PortSuspendStatusChange (PSSC) is set at the end of the resume
interval. This bit cannot be set if CurrentConnectStatus (CCS) is
cleared. This bit is also cleared when PortResetStatusChange
(PRSC) is set at the end of the port reset or when the Host Controller
is placed in the USBResume state. If an upstream resume is in
progress, it should propagate to the Host Controller.
0 — port is not suspended
1 — port is suspended
On write SetPortSuspend: The HCD sets the PortSuspendStatus
(PSS) bit by writing logic 1 to this bit. Writing logic 0 has no effect. If
CurrentConnectStatus (CCS) is cleared, this write does not set
PortSuspendStatus (PSS); instead it sets ConnectStatusChange
(CSC). This informs the driver that it attempted to suspend a
disconnected port.
…continued
Single-chip USB OTG Controller
© NXP B.V. 2007. All rights reserved.
ISP1362
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