ISP1362EE ST-Ericsson Inc, ISP1362EE Datasheet - Page 87

• Manufacturer Part Number: ISP1362EE
• Description: IC USB CTRL SNGL CHIP 64TFBGA
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1362EE

• Controller Type: USB 2.0 Controller
• Interface: Parallel/Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -

NXP Semiconductors
ISP1362_5
Product data sheet
Table 62.
Bit
16
15 to 10
9
8
7 to 5
HcRhPortStatus[1:2] register: bit description
Symbol
CSC
-
LSDA
PPS
-
Rev. 05 — 8 May 2007
Description
ConnectStatusChange: This bit is set whenever a connect or
disconnect event occurs. The HCD writes logic 1 to clear this bit.
Writing logic 0 has no effect. If CurrentConnectStatus (CCS) is cleared
when a SetPortReset, SetPortEnable or SetPortSuspend write occurs,
this bit is set to force the driver to re-evaluate the connection status
because these writes should not occur if the port is disconnected.
0 — no change in CurrentConnectStatus (CCS)
1 — change in CurrentConnectStatus (CCS)
Remark: If the DeviceRemovable[NDP] bit is set, this bit is set only
after a root hub reset to inform the system that the device is attached.
reserved
On read LowSpeedDeviceAttached: This bit indicates the speed of
the device attached to this port. When set, a low-speed device is
attached to this port. When cleared, a full-speed device is attached to
this port. This field is valid only when CurrentConnectStatus (CCS) is
set.
0 — full-speed device attached
1 — low-speed device attached
On write ClearPortPower: The HCD clears the PortPowerStatus
(PPS) bit by writing logic 1 to this bit. Writing logic 0 has no effect.
On read PortPowerStatus: This bit reflects the port power status,
regardless of the type of power switching implemented. This bit is
cleared if an overcurrent condition is detected. The HCD sets this bit
by writing SetPortPower or SetGlobalPower. The HCD clears this bit
by writing ClearPortPower or ClearGlobalPower. PowerSwitchingMode
(PCM) and PortPowerControlMask[NDP] (PPCM[NDP]) determine
which power control switches are enabled. In global switching mode
(PowerSwitchingMode = 0), only the Set/ClearGlobalPower command
controls this bit. In the per-port power switching
(PowerSwitchingMode = 1), if the PortPowerControlMask[NDP]
(PPCM[NDP]) bit for the port is set, only Set/ClearPortPower
commands are enabled. If the mask is not set, only
Set/ClearGlobalPower commands are enabled. When port power is
disabled, CurrentConnectStatus (CCS), PortEnableStatus (PES),
PortSuspendStatus (PSS) and PortResetStatus (PRS) should be
reset.
0 — port power is off
1 — port power is on
On write SetPortPower: The HCD writes logic 1 to set the
PortPowerStatus (PPS) bit. Writing logic 0 has no effect.
Remark: This bit always reads logic 1 if power switching is not
supported.
reserved
…continued
Single-chip USB OTG Controller
© NXP B.V. 2007. All rights reserved.
ISP1362
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