ISP1362EE ST-Ericsson Inc, ISP1362EE Datasheet - Page 9

• Manufacturer Part Number: ISP1362EE
• Description: IC USB CTRL SNGL CHIP 64TFBGA
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1362EE

• Controller Type: USB 2.0 Controller
• Interface: Parallel/Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -

NXP Semiconductors
Table 2.
ISP1362_5
Product data sheet
Symbol
V
D12
D13
D14
D15
DGND
RD
CS
WR
TEST0
DREQ1
CC
[1]
Pin description
Pin
LQFP64
14
15
16
17
18
19
20
21
22
23
24
TFBGA64
J2
J1
K1
K2
J3
K3
J4
K4
J5
K5
J6
…continued
Type
-
I/O
I/O
I/O
I/O
-
I
I
I
I/O
O
Description
supply voltage (3.3 V); it is recommended that you connect a decoupling
capacitor of 0.01 F
bit 12 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, 3-state output
bit 13 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, 3-state output
bit 14 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, 3-state output
bit 15 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, 3-state output
digital ground
read strobe input; when asserted LOW, it indicates that the Host
Controller/Peripheral Controller driver is requesting a read to the buffer
memory or the internal registers of the Host Controller/Peripheral
Controller
input with hysteresis
chip select input (active LOW); enables the Host Controller/Peripheral
Controller driver to access the buffer memory and registers of the Host
Controller/Peripheral Controller
input
write strobe input; when asserted LOW, it indicates that the Host
Controller/Peripheral Controller driver is requesting a write to the buffer
memory or the internal registers of the Host Controller/Peripheral
Controller
input with hysteresis
for test input and output; pulled HIGH by a 100 k resistor
bidirectional, push-pull input, 3-state output
DMA request output; when active, it signals the DMA controller that a
data transfer is requested by the Host Controller; the active level (HIGH
or LOW) of the request is programmed by using the
HcHardwareConfiguration register (20h/A0h)
If the OneDMA bit of the HcHardwareConfiguration register is set to
logic 1, both the Host Controller and the Peripheral Controller DMA
channel will be routed to DREQ1 and DACK1.
push-pull output
Rev. 05 — 8 May 2007
Single-chip USB OTG Controller
© NXP B.V. 2007. All rights reserved.
ISP1362
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