PIC18F8722-I/PT Microchip Technology Inc., PIC18F8722-I/PT Datasheet - Page 103

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PIC18F8722-I/PT

Manufacturer Part Number
PIC18F8722-I/PT
Description
80 PIN, 128 KB FLASH, 4K RAM, 70 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F8722-I/PT

A/d Inputs
16-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
1024 Bytes
Input Output
70
Interface
SPI/I2C/USART
Memory Type
Flash
Number Of Bits
8
Package Type
80-pin TQFP
Programmable Memory
128K Bytes
Ram Size
3.9K Bytes
Speed
40 MHz
Timers
2-8 bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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PIC18F8722-I/PT
0
7.5.1
Figure 7-1 shows an example of 16-bit Byte Write
mode for PIC18F8527/8622/8627/8722 devices. This
mode is used for two separate 8-bit memories con-
nected for 16-bit operation. This generally includes
basic EPROM and Flash devices. It allows table writes
to byte-wide external memories.
FIGURE 7-1:
 2004 Microchip Technology Inc.
Note 1:
PIC18F8X27/8X22
2:
16-BIT BYTE WRITE MODE
A<19:16>
AD<15:8>
AD<7:0>
Upper-order address lines are used only for 20-bit address widths.
This signal only applies to table writes. See Section 6.1 “Table Reads and Table Writes”.
WRH
WRL
ALE
CE
OE
(1)
16-BIT BYTE WRITE MODE EXAMPLE
373
373
Preliminary
D<7:0>
A<19:0>
D<15:8>
During a TBLWT instruction cycle, the TABLAT data is
presented on the upper and lower bytes of the
AD15:AD0 bus. The appropriate WRH or WRL control
line is strobed on the LSb of the TBLPTR.
PIC18F8722 FAMILY
A<x:0>
D<7:0>
CE
OE
(MSB)
WR
(2)
Address Bus
Data Bus
Control Lines
D<7:0>
DS39646B-page 101
A<x:0>
D<7:0>
CE
OE
(LSB)
WR
(2)

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