PIC18F8722-I/PT Microchip Technology Inc., PIC18F8722-I/PT Datasheet - Page 196
PIC18F8722-I/PT
Manufacturer Part Number
PIC18F8722-I/PT
Description
80 PIN, 128 KB FLASH, 4K RAM, 70 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F8722-IPT.pdf
(448 pages)
Specifications of PIC18F8722-I/PT
A/d Inputs
16-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
1024 Bytes
Input Output
70
Interface
SPI/I2C/USART
Memory Type
Flash
Number Of Bits
8
Package Type
80-pin TQFP
Programmable Memory
128K Bytes
Ram Size
3.9K Bytes
Speed
40 MHz
Timers
2-8 bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F8722-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F8722-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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PIC18F8722 FAMILY
18.4.3
The P1M1:P1M0 bits in the CCP1CON register allow
one of four configurations:
• Single Output
• Half-Bridge Output
• Full-Bridge Output, Forward mode
• Full-Bridge Output, Reverse mode
FIGURE 18-2:
DS39646B-page 194
Relationships:
• Period = 4 * T
• Duty Cycle = T
• Delay = 4 * T
Note 1:
00
10
01
11
PWM OUTPUT CONFIGURATIONS
CCP1CON<7:6>
(Single Output)
(Half-Bridge)
(Full-Bridge,
(Full-Bridge,
Reverse)
Forward)
Dead-band delay is programmed using the ECCP1DEL register (Section 18.4.6 “Programmable
Dead-Band Delay”).
PWM OUTPUT RELATIONSHIPS (ACTIVE-HIGH STATE)
OSC
OSC
OSC
* (ECCP1DEL<6:0>)
* (PR2 + 1) * (TMR2 Prescale Value)
* (CCPR1L<7:0>:CCP1CON<5:4>) * (TMR2 Prescale Value)
P1A Modulated
P1A Modulated
P1B Modulated
P1A Active
P1B Inactive
P1C Inactive
P1D Modulated
P1A Inactive
P1B Modulated
P1C Active
P1D Inactive
SIGNAL
Preliminary
0
Delay
The Single Output mode is the standard PWM mode
discussed in Section 18.4 “Enhanced PWM Mode”.
The Half-Bridge and Full-Bridge Output modes are
covered in detail in the sections that follow.
The general relationship of the outputs in all
configurations is summarized in Figure 18-2.
(1)
Cycle
Duty
Delay
Period
(1)
2004 Microchip Technology Inc.
PR2 + 1
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