PIC18F8722-I/PT Microchip Technology Inc., PIC18F8722-I/PT Datasheet - Page 284

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PIC18F8722-I/PT

Manufacturer Part Number
PIC18F8722-I/PT
Description
80 PIN, 128 KB FLASH, 4K RAM, 70 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F8722-I/PT

A/d Inputs
16-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
1024 Bytes
Input Output
70
Interface
SPI/I2C/USART
Memory Type
Flash
Number Of Bits
8
Package Type
80-pin TQFP
Programmable Memory
128K Bytes
Ram Size
3.9K Bytes
Speed
40 MHz
Timers
2-8 bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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Part Number:
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Manufacturer:
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Quantity:
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Part Number:
PIC18F8722-I/PT
0
PIC18F8722 FAMILY
22.1
There are eight modes of operation for the compara-
tors, shown in Figure 22-1. Bits CM2:CM0 of the
CMCON register are used to select these modes. The
TRISF register controls the data direction of the
comparator pins for each mode. If the Comparator
FIGURE 22-1:
DS39646B-page 282
Comparators Reset
CM2:CM0 = 000
Two Independent Comparators
CM2:CM0 = 010
Two Common Reference Comparators
CM2:CM0 = 100
One Independent Comparator with Output
CM2:CM0 = 001
RF5/AN10/
CV
RF6/AN11
RF5/AN10/
CV
RF5/AN10/
CV
RF4/AN9
RF3/AN8
RF6/AN11
RF2/AN7/
C1OUT*
RF6/AN11
RF4/AN9
RF3/AN8
RF5/AN10/
CV
RF4/AN9
RF3/AN8
RF6/AN11
RF4/AN9
RF3/AN8
A = Analog Input, port reads zeros always
* Setting the TRISF<2:1> bits will disable the comparator outputs by configuring the pins as inputs.
REF
REF
REF
REF
Comparator Configuration
A
A
A
A
A
A
A
A
A
A
A
D
A
A
D
D
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
COMPARATOR I/O OPERATING MODES
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
C1
C2
C1
C2
C1
C2
C1
C2
Off (Read as ‘0’)
Off (Read as ‘0’)
C1OUT
C2OUT
C1OUT
C2OUT
C1OUT
Off (Read as ‘0’)
D = Digital Input
Preliminary
Two Common Reference Comparators with Outputs
CM2:CM0 = 101
Two Independent Comparators with Outputs
CM2:CM0 = 011
Comparators Off (POR Default Value)
CM2:CM0 = 111
RF5/AN10/
CV
Four Inputs Multiplexed to Two Comparators
CM2:CM0 = 110
RF6/AN11
RF4/AN9
RF3/AN8
RF6/AN11
RF5/AN10
RF2/AN7/C1OUT*
RF4/AN9
RF3/AN8
RF1/AN6/C2OUT*
RF5/AN10/
CV
RF2/AN7/
C1OUT*
RF1/AN6/C2OUT*
RF6/AN11
RF4/AN9
RF3/AN8
RF5/AN10/
CV
RF6/AN11
RF4/AN9
RF3/AN8
mode is changed, the comparator output level may not
be valid for the specified mode change delay shown in
Section 28.0 “Electrical Characteristics”.
REF
REF
REF
Note:
CIS (CMCON<3>) is the Comparator Input Switch
A
A
A
A
D
D
D
D
A
A
A
A
A
A
A
D
Comparator interrupts should be disabled
during a Comparator mode change;
otherwise, a false interrupt may occur.
V
V
V
V
V
V
V
V
CIS = 0
CIS = 1
CIS = 0
CIS = 1
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
-
+
-
+
-
+
-
+
-
+
-
+
 2004 Microchip Technology Inc.
C1
C2
C1
C2
C1
C2
V
V
V
V
IN
IN
IN
IN
CV
-
+
-
+
REF
C1OUT
C2OUT
Off (Read as ‘0’)
Off (Read as ‘0’)
C1
C2
C1OUT
C2OUT
From V
REF
C1OUT
C2OUT
Module

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