PIC18F8722-I/PT Microchip Technology Inc., PIC18F8722-I/PT Datasheet - Page 124

• Manufacturer Part Number: PIC18F8722-I/PT
• Description: 80 PIN, 128 KB FLASH, 4K RAM, 70 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F8722-I/PT

• A/d Inputs: 16-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 70
• Interface: SPI/I2C/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 80-pin TQFP
• Programmable Memory: 128K Bytes
• Ram Size: 3.9K Bytes
• Speed: 40 MHz
• Timers: 2-8 bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F8722 FAMILY
REGISTER 10-2:
DS39646B-page 122
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
RBPU: PORTB Pull-up Enable bit
1 = All PORTB pull-ups are disabled
0 = PORTB pull-ups are enabled by individual port latch values
INTEDG0: External Interrupt 0 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
INTEDG1: External Interrupt 1 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
INTEDG2: External Interrupt 2 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
INTEDG3: External Interrupt 3 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
TMR0IP: TMR0 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
INT3IP: INT3 External Interrupt Priority bit
1 = High priority
0 = Low priority
RBIP: RB Port Change Interrupt Priority bit
1 = High priority
0 = Low priority
bit 7
INTCON2: INTERRUPT CONTROL REGISTER 2
Legend:
R = Readable bit
-n = Value at POR
Note:
R/W-1
RBPU
Interrupt flag bits are set when an interrupt condition occurs, regardless of the state
of its corresponding enable bit or the global interrupt enable bit. User software should
ensure the appropriate interrupt flag bits are clear prior to enabling an interrupt. This
feature allows for software polling.
INTEDG0
R/W-1
INTEDG1
R/W-1
Preliminary
W = Writable bit
‘1’ = Bit is set
INTEDG2
R/W-1
INTEDG3
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
TMR0IP
R/W-1
 2004 Microchip Technology Inc.
x = Bit is unknown
INT3IP
R/W-1
R/W-1
RBIP
bit 0