PIC18F8722-I/PT Microchip Technology Inc., PIC18F8722-I/PT Datasheet - Page 106

• Manufacturer Part Number: PIC18F8722-I/PT
• Description: 80 PIN, 128 KB FLASH, 4K RAM, 70 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F8722-I/PT

• A/d Inputs: 16-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 70
• Interface: SPI/I2C/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 80-pin TQFP
• Programmable Memory: 128K Bytes
• Ram Size: 3.9K Bytes
• Speed: 40 MHz
• Timers: 2-8 bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F8722 FAMILY
7.5.4
The presentation of control signals on the external
memory bus is different for the various operating
modes. Typical signal timing diagrams are shown in
Figure 7-4 through Figure 7-6. All examples assume
either 20-bit or 21-bit address widths.
FIGURE 7-4:
FIGURE 7-5:
DS39646B-page 104
Instruction
AD<15:0>
Execution
A<19:16>
Memory
Instruction
AD<15:0>
A<19:16>
Execution
Cycle
ALE
Memory
CE
OE
Apparent Q
Cycle
16-BIT MODE TIMING
WRH
WRL
BA0
ALE
Actual Q
OE
CE
‘0’
‘1’
‘1’
Q1
EXTERNAL MEMORY BUS TIMING FOR TBLRD WITH A 1 T
(MICROPROCESSOR MODE)
EXTERNAL MEMORY BUS TIMING FOR TBLRD
(EXTENDED MICROCONTROLLER MODE)
Opcode Fetch
INST(PC – 2)
from 000100h
Q1
Q1
Q2
TBLRD *
3AABh
TBLRD Cycle 1
Opcode Fetch
from 007556h
Q2
Q2
MOVLW 55h
Q3
00h
Q4
Q3
Q3
0E55h
Q1
Q4
Q4
TBLRD Cycle 1
Opcode Fetch
from 000102h
MOVLW 55h
Q2
Preliminary
Q1
Q1
Q3
CF33h
Q2
Q2
Q4
Q3
Q3
Q1
from 199E67h
TBLRD Cycle 2
CF33h
Table Read
from 199E67h
TBLRD Cycle 2
TBLRD 92h
of 92h
Q2
Q4
Q4
0Ch
0Ch
Q3
Q4
Q1
9256h
9256h
Q4
1 T
Q4
Q2
 2004 Microchip Technology Inc.
CY
Q1
Wait
CY
Opcode Fetch
Q4
Q3
from 000104h
ADDLW 55h
Q2
WAIT STATE
MOVLW
Q4
Q4
Q3
‘1’
‘1’
‘0’
Q4