PIC18F8722-I/PT Microchip Technology Inc., PIC18F8722-I/PT Datasheet - Page 207

• Manufacturer Part Number: PIC18F8722-I/PT
• Description: 80 PIN, 128 KB FLASH, 4K RAM, 70 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F8722-I/PT

• A/d Inputs: 16-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 70
• Interface: SPI/I2C/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 80-pin TQFP
• Programmable Memory: 128K Bytes
• Ram Size: 3.9K Bytes
• Speed: 40 MHz
• Timers: 2-8 bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

19.0
19.1
The Master Synchronous Serial Port (MSSP) module is
a serial interface, useful for communicating with other
peripheral or microcontroller devices. These peripheral
devices may be serial EEPROMs, shift registers,
display drivers, A/D converters, etc. The MSSP module
can operate in one of two modes:
• Serial Peripheral Interface (SPI™)
• Inter-Integrated Circuit (I
The I
hardware:
• Master mode
• Multi-Master mode
• Slave mode
All members of the PIC18F8722 family have two MSSP
modules, designated as MSSP1 and MSSP2. Each
module operates independently of the other.
19.2
Each MSSP module has three associated control regis-
ters. These include a status register (SSPxSTAT) and
two control registers (SSPxCON1 and SSPxCON2). The
use of these registers and their individual configuration
bits differ significantly depending on whether the MSSP
module is operated in SPI or I
Additional details are provided under the individual
sections.
 2004 Microchip Technology Inc.
- Full Master mode
- Slave mode (with general address call)
Note:
Note:
2
C interface supports the following modes in
MASTER SYNCHRONOUS
SERIAL PORT (MSSP)
MODULE
Master SSP (MSSP) Module
Overview
Control Registers
Throughout this section, generic refer-
ences to an MSSP module in any of its
operating modes may be interpreted as
being equally applicable to MSSP1 or
MSSP2. Register names and module I/O
signals use the generic designator ‘x’ to
indicate the use of a numeral to distinguish
a particular module when required. Control
bit names are not individuated.
In devices with more than one MSSP
module, it is very important to pay close
attention to SSPCON register names.
SSP1CON1 and
different operational aspects of the same
module,
SSP2CON1 control the same features for
two different modules.
while
2
C™)
2
C mode.
SSP1CON2 control
SSP1CON1
and
Preliminary
19.3
The SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. All four
modes
communication, typically three pins are used:
• Serial Data Out (SDOx) – RC5/SDO1 or
• Serial Data In (SDIx) – RC4/SDI1/SDA1 or
• Serial Clock (SCKx) – RC3/SCK1/SCL1 or
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SSx) – RF7/SS1 or RD7/SS2
Figure 19-1 shows the block diagram of the MSSP
module when operating in SPI mode.
FIGURE 19-1:
PIC18F8722 FAMILY
Note:
RC3
RD4/SDO2
RD5/SDI2/SDA2
RD6/SCK2/SCL2
RC4
RC5
RF7
or
or
or
or
RD6
Only port I/O names are used in this diagram for
the sake of brevity. Refer to the text for a full list of
multiplexed functions.
SPI Mode
of
RD7
RD5
RD4
SPI
Read
are
SSx Control
Select
SMP:CKE
Edge
MSSP BLOCK DIAGRAM
(SPI™ MODE)
Select
bit 0
Edge
Enable
supported.
TRIS bit
SSPxBUF reg
Data to TXx/RXx in SSPxSR
SSPxSR reg
2
SSPM3:SSPM0
Clock Select
4
2
DS39646B-page 205
(
Prescaler
To
4, 16, 64
TMR2 Output
Write
Clock
Shift
accomplish
Data Bus
Internal
2
T
OSC
)