TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 102

• Manufacturer Part Number: TMPM333FDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
• Manufacturer: Toshiba

Specifications of TMPM333FDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 512K
• Rom Type: Flash
• Ram (kbytes): 32K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

7.6
Exception/Interrupt-Related Registers
31-18
17-8
7
6-0
After reset
After reset
After reset
After reset
bit symbol
bit symbol
bit symbol
bit symbol
7.6.2.10
Bit
Note:For descriptions of interrupts and interrupt numbers, see Section "7.5.1.5 List of Interrupt Sources".
−
SETPEND
-
SETPEND
Bit Symbol
(Interrupt 47)
SETPEND
Undefined
Undefined
Interrupt Set-Pending Register 2
31
23
15
0
0
7
-
-
-
R
R/W
R/W
R/W
Type
(Interrupt 46)
(Interrupt 38)
SETPEND
Undefined
SETPEND
Undefined
30
22
14
0
0
6
-
-
Read as 0.
Interrupt number [49:40]
[Write]
1: Pend
[Read]
0: Not pending
1: Pending
Each bit corresponds to the specified number can force interrupts into the pending state and determines which
interrupts are currently pending.
Writing "1" to a bit in this register pends the corresponding interrupt. However, writing "1" has no effect on an
interrupt that is already pending or is disabled. Writing "0" has no effect.
Reading the bit returns the current state of the corresponding interrupts.
Clear and Interrupt Set-Pending Register bit by writing "1" to the corresponding bit in the Interrupt Clear-Pending
Register.
Write "0".
Interrupt number [38:32]
[Write]
1: Pend
[Read]
0: Not pending
1: Pending
Each bit corresponds to the specified number can force interrupts into the pending state and determines which
interrupts are currently pending.
Writing "1" to a bit in this register pends the corresponding interrupt. However, writing "1" has no effect on an
interrupt that is already pending or is disabled. Writing "0" has no effect.
Reading the bit returns the current state of the corresponding interrupts.
Clear and Interrupt Set-Pending Register bit by writing "1" to the corresponding bit in the Interrupt Clear-Pending
Register.
(Interrupt 45)
(Interrupt 37)
SETPEND
SETPEND
Undefined
Undefined
29
21
13
0
0
5
-
-
(Interrupt 44)
(Interrupt 36)
SETPEND
SETPEND
Undefined
Undefined
Page 82
28
20
12
0
0
4
-
-
(Interrupt 43)
(Interrupt 35)
SETPEND
SETPEND
Undefined
Undefined
27
19
11
Function
0
0
3
-
-
(Interrupt 42)
(Interrupt 34)
SETPEND
SETPEND
Undefined
Undefined
26
18
10
0
0
2
-
-
TMPM333FDFG/FYFG/FWFG
(Interrupt 49)
(Interrupt 41)
(Interrupt 33)
SETPEND
SETPEND
SETPEND
Undefined
Undefined
Undefined
25
17
0
9
1
-
(Interrupt 48)
(Interrupt 40)
(Interrupt 32)
SETPEND
SETPEND
SETPEND
Undefined
Undefined
Undefined
24
16
0
8
0
-