TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 312

• Manufacturer Part Number: TMPM333FDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
• Manufacturer: Toshiba

Specifications of TMPM333FDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 512K
• Rom Type: Flash
• Ram (kbytes): 32K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

11.6
Data Transfer Procedure in the I2C Bus ModeI2C
Table 11-2 Processing in Slave Mode
<TRX>
1
0
<AL>
1
0
1
0
<AAS>
1
1
0
1
0
1
0
<AD0>
1/0
1/0
1/0
0
0
0
0
Arbitration Lost is detected while the slave address
was being transmitted and the SBI received a slave
address with the direction bit "1" transmitted by an-
other master.
In the slave receiver mode, the SBI received a slave
address with the direction bit "1" transmitted by the
master.
In the slave transmitter mode, the SBI has completed
a transmission of one data word.
Arbitration Lost is detected while a slave address is
being transmitted, and the SBI receives either a slave
address with the direction bit "0" or a general-call ad-
dress transmitted by another master.
Arbitration Lost is detected while a slave address or a
data word is being transmitted, and the transfer is ter-
minated.
In the slave receiver mode, the SBI received either a
slave address with the direction bit "0" or a general-
call address transmitted by the master.
In the slave receiver mode, the SBI has completed a
reception of a data word.
State
Page 292
Set the number of bits in a data word to <BC[2:0]> and
write the transmit data into SBIxDBR.
Test LRB. If it has been set to "1", that means the re-
ceiver does not require further data. Set <PIN> to 1
and reset <TRX> to 0 to release the bus. If <LRB> has
been reset to "0", that means the receiver requires
further data. Set the number of bits in the data word
to <BC[2:0]> and write the transmit data to the
SBIxDBR.
Read the SBIxDBR (a dummy read) to set <PIN> to
1, or write "1" to <PIN>.
Set the number of bits in the data word to <BC[2:0].>
and read the received data from SBIxDBR.
TMPM333FDFG/FYFG/FWFG
Processing