TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 92

• Manufacturer Part Number: TMPM333FDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
• Manufacturer: Toshiba

Specifications of TMPM333FDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 512K
• Rom Type: Flash
• Ram (kbytes): 32K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

7.6
Exception/Interrupt-Related Registers
7.6
7.6.1
respective addresses.
Exception/Interrupt-Related Registers
The CPU's NVIC registers and clock generator registers described in this chapter are shown below with their
NVIC registers
Clock generator registers
SysTick Control and Status Register
SysTick Reload Value Register
SysTick Current Value Register
SysTick Calibration Value Register
Interrupt Set-Enable Register 1
Interrupt Set-Enable Register 2
Interrupt Clear-Enable Register 1
Interrupt Clear-Enable Register 2
Interrupt Set-Pending Register 1
Interrupt Set-Pending Register 2
Interrupt Clear-Pending Register 1
Interrupt Clear-Pending Register 2
Interrupt Priority Register
Vector Table Offset Register
Application Interrupt and Reset Control Register
System Handler Priority Register
System Handler Control and State Register
CG Interrupt Request Clear Register
NMI Flag Register
Reset Flag Register
CG Interrupt Mode Control Register A
CG Interrupt Mode Control Register B
CG Interrupt Mode Control Register C
Reserved
Reserved
Reserved
Reserved
Reserved
Register List
Note:Access to the "Reserved" areas is prohibited.
Register name
Register name
Page 72
CGRSTFLG
CGNMIFLG
CGICRCG
CGIMCGA
CGIMCGB
CGIMCGC
-
-
-
-
-
Base Address = 0xE000_E000
Base Address = 0x4004_0200
0x0D18, 0x0D1C, 0x0D20
TMPM333FDFG/FYFG/FWFG
0x0400 ~ 0x0430
Address
Address
0x001C
0x0D08
0x0D0C
0x0D24
0x001C
0x002C
0x003C
0x0010
0x0014
0x0018
0x0100
0x0104
0x0180
0x0184
0x0200
0x0204
0x0280
0x0284
0x0014
0x0018
0x0020
0x0024
0x0028
0x0030
0x0034
0x0038