TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 283

• Manufacturer Part Number: TMPM333FDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
• Manufacturer: Toshiba

Specifications of TMPM333FDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 512K
• Rom Type: Flash
• Ram (kbytes): 32K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

(2)
SCLK Input Mode
・ If SCxMOD2<WBUF> is set to "0" and the transmit double buffer is disabled
・ If SCxMOD2<WBUF> is set to "1" and the double buffer is enabled.
<WBUF> settings.
shifted into the receive buffer when the SCLK input becomes active.The INTTXx interrupt is
generated upon completion of data transmission. The INTTRXx interrupt is generated when
the data is moved from shift register to receive buffer after completion of data reception.
the next frame (data must be written before the point A in Figure 10-17). Data must be read
before completing reception of the next frame data.
transmit shift register after completing data transmission from the transmit shift register. At
the same time, data received is shifted to the shift register, it is moved to the receive buffer,
and the INTRXx interrupt is generated.
the next frame (data must be written before the point A in Figure 10-17). Data must be read
before completing reception of the next frame data.
data has been moved from transmit buffer) is started while receive data is shifted into receive
shift register simultaneously.
overrun error occurs. Similarly, if there is no data written to transmit buffer when SCLK for
the next frame is input, an under-run error occurs.
When receiving data, double buffer is always enabled regardless of the SCxMOD2
8-bit data written in the transmit buffer is outputted from the TXD pin and 8 bit of data is
Note that transmit data must be written into the transmit buffer before the SCLK input for
The interrupt INTRXx is generated at the timing the transmit buffer data is moved to the
Note that transmit data must be written into the transmit buffer before the SCLK input for
Upon the SCLK input for the next frame, transmission from transmit shift register (in which
If data in receive buffer has not been read when the last bit of the frame is received, an
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TMPM333FDFG/FYFG/FWFG