TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 390

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TMPM333FDFG

Manufacturer Part Number
TMPM333FDFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
Manufacturer
Toshiba
Datasheets

Specifications of TMPM333FDFG

Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
512K
Rom Type
Flash
Ram (kbytes)
32K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
-
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM333FDFG
Manufacturer:
Toshiba
Quantity:
10 000
15.2
Operation Mode
15.2.2
15.2.2.1
buses for flash memory program code on the old application and for serial I/O are different. It operates at the
single chip mode; therefore, a switch from normal mode in which user application is activated at the single chip
mode to User Boot Mode for programming flash is required. Specifically, add a mode judgment routine to a reset
program in the old application.
conformity with the user’s system setup condition. Also, flash memory programming routine that the user
uniquely makes up needs to be set in the new application. This routine is used for programming after being
switched to User Boot Mode. The execution of the programming routine must take place while it is stored in the
area other than the flash memory since the data in the internal flash memory cannot be read out during delete/
writing mode. Once re-programming is complete, it is recommended to protect relevant flash blocks from acci-
dental corruption during subsequent Single-Chip (Normal mode) operations. Be sure not to cause any exceptions
including a non-maskable while User Boot Mode.
memory. For a detailed description of the erase and program sequence, refer to "15.3 On-board Programming of
Flash Memory (Rewrite/Erase)".
User Boot mode is to use flash memory programming routine defined by users. It is used when the data transfer
The condition to switch the modes needs to be set by using the I/O of TMPM333FDFG/FYFG/FWFG in
(1-A) and (1-B) are the examples of programming with routines in the internal flash memory and in the external
User Boot Mode (Single chip mode)
(1)
(1-A) Method 1: Storing a Programming Routine in the Flash Memory
and the I/O bus to be used to transfer new program code. Create hardware and software accordingly.
Before installing the TMPM333FDFG/FYFG/FWFG on a printed circuit board, write the following
program routines into an arbitrary flash block using programming equipment.
Determine the conditions (e.g., pin states) required for the flash memory to enter User Boot mode
(a) Mode judgment routine:
(b) Programming routine:
(c) Copy routine:
Step-1
TMPM333FDFG/FYFG/FWFG
(a) Mode Judgment Routine
(b) Programming Routine
(c) Copy routine
Old Application
[Reset Procedure]
Program Code
Flash memory
Code to determine whether or not to switch to User Boot mode
Code to download new program code from a host controller and
re-program the flash memory
Code to copy the data described in (b) from the
TMPM333FDFG/FYFG/FWFG flash memory to either the
TMPM333FDFG/FYFG/FWFG on-chip RAM or external mem-
ory device.
Page 370
(I/O)
RAM
(Host)
New Application
Program Code
TMPM333FDFG/FYFG/FWFG

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