TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 22

• Manufacturer Part Number: TMPM333FDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
• Manufacturer: Toshiba

Specifications of TMPM333FDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 512K
• Rom Type: Flash
• Ram (kbytes): 32K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

1.1
Features
5. Watchdog timer (WDT): 1 channel
6. General-purpose serial interface (SIO/UART): 3 channels
7. Serial bus interface (I2C/SIO): 3channels
8. 10-bit AD converter (ADC): 12 channels
9. Interrupt source
10. Non-maskable interrupt (NMI)
11. Input/ output ports (PORT): 78 pins
12. Standby mode
13. Clock generator (CG)
14. Endian
15. Maximum operating frequency: 40 MHz
16. Operating voltage range
17. Temperature range
18. Package
・ Time correction + or − 30seconds (by software)
・ Alarm (Alarm output)
・ Alarm interrupt
・ Start by an internal timer trigger
・ Fixed channel/scan mode
・ Single/repeat mode
・ AD monitoring 2ch
・ Conversion speed 1.15μsec. (@fsys = 40MHz)
・ Internal: 38 factors...The order of precedence can be set over 7 levels
・ External: 8 factors...The order of precedence can be set over 7 levels.
・ Standby modes: IDLE, SLOW, SLEEP, STOP
・ Sub clock operation(32.768kHz):SLOW, SLEEP
・ On-chip PLL (quadrupled)
・ Clock gear function: The high-speed clock can be divided into 1/1, 1/2, 1/4 or 1/8.
・ -20 to 85 degrees (except during Flash writing/ erasing)
・ 0 to 70 degrees (during Flash writing/ erasing)
Watchdog timer (WDT) generates a reset or a non-maskable interrupt (NMI).
Either UART mode or synchronous mode can be selected (4byte FIFO equipped)
Either I2C bus mode or synchronous mode can be selected.
Non-maskable interrupt (NMI) is generated by a watchdog timer or a NMI pin.
Little endian
2.7 V to 3.6 V (with on-chip regulator)
LQFP100-P-1414-0.50H (14mm × 14mm, 0.5mm pitch)
(except the watchdog timer interrupt).
Page 2
TMPM333FDFG/FYFG/FWFG