TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 352

• Manufacturer Part Number: TMPM333FDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
• Manufacturer: Toshiba

Specifications of TMPM333FDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 512K
• Rom Type: Flash
• Ram (kbytes): 32K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

12.4
Description of Operations
12.4
12.4.1
12.4.2
12.4.2.1
Description of Operations
applied to the VREFL pin.
time the internal reference voltage should stabilize, and then write "1" to the ADMOD0<ADS> bit.
a switched -off state. To switch to the power-consumption mode, set "0" to the <VREFON> bit after conversion.
The "High" level of the analog reference voltage shall be applied to the VRFEH pin, and the "Low" shall be
To start AD conversion, make sure that you first write "1" to the <VREFON> bit, wait for 3 μs during which
By writing "0" to the ADMOD1<VREFON> bit, a switched-on state of VREFH − VREFL can be turned into
Two types of AD conversion are supported: normal AD conversion and top-priority AD conversion.
For normal AD conversion, the following four operation modes are supported.
Analog Reference Voltage
AD Conversion Mode
selected with the ADMOD0<REPEAT, SCAN>.
Note:VREFL and AVSS are shared by TMPM333FDFG/FYFG/FWFG.
(1)
(2)
For normal AD conversion, the following four operation modes are supported and the operation mode is
Normal AD conversion
single conversion mode.
completed, ADMOD0<EOCFN> is set to "1", ADMOD0<ADBFN> is cleared to "0", and the AD
conversion completion interrupt request (INTAD) is generated. <EOCFN> is cleared to "0" upon read.
single conversion mode.
version is completed, ADMOD0<EOCFN> is set to "1", ADMOD0<ADBFN> is cleared to "0", and
the conversion completion interrupt request (INTAD) is generated. <EOCFN> is cleared to "0".
・ Fixed channel single conversion mode
・ Channel scan single conversion mode
・ Fixed channel repeat conversion mode
・ Channel scan repeat conversion mode
If ADMOD0<REPEAT, SCAN> is set to "00", "AD conversion is performed in the fixed channel
In this mode, AD conversion is performed once for one channel selected. After AD conversion is
If ADMOD0 <REPEAT, SCAN> is set to "01," AD conversion is performed in the channel scan
In this mode, AD conversion is performed once for each scan channel selected. After AD scan con-
Fixed channel single conversion mode
Channel scan single conversion mode
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TMPM333FDFG/FYFG/FWFG