TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 270

• Manufacturer Part Number: TMPM333FDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
• Manufacturer: Toshiba

Specifications of TMPM333FDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 512K
• Rom Type: Flash
• Ram (kbytes): 32K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

10.13
Handshake function
10.13
and to prevent overrun errors. This function can be enabled or disabled by SCxMOD0<CTSE>.
mission is suspended until the CTS pin returns to the "Low" level. However in this case, the INTTXx interrupt is
generated in the normal timing, the next transmit data is written in the transmit buffer, and it waits until it is ready to
transmit data.
port for the RTS function. By setting the port to "High" level upon completion of data reception (in the receive interrupt
routine), the transmit side can be requested to suspend data transmission.
The function of the handshake is to enable frame-by-frame data transmission by using the CTS (Clear to send) pin
When the CTS pin is set to "High" level, the current data transmission can be completed but the next data trans-
Although no RTS pin is provided, a handshake control function can easily implemented by assigning one bit of the
Note:(1) If the CTS signal is set to "H" during transmission, the next data transmission is suspended after the
Handshake function
current transmission is completed.
(2) Data transmission starts on the first falling edge of the TXDCLK clock after CTS is set to "L".
Data write to transmit
buffer or shift register
TXDCLK
SIOCLK
CTS
TXD
Transmit side
Figure 10-8 Handshake Function
a
Figure 10-9 CTS Signal timing
Transmission is
suspended during
this period.
TXD
CTS
13 14 15 16
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b
1
2
Start bit
RXD
RTS (Any port)
3
Receive side
14 15 16
TMPM333FDFG/FYFG/FWFG
1
2
Bit 0
3