TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 61

• Manufacturer Part Number: TMPM333FDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
• Manufacturer: Toshiba

Specifications of TMPM333FDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 512K
• Rom Type: Flash
• Ram (kbytes): 32K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

6.3.3
XT1
XT2
X1
X2
Starts oscillation after reset
Clock system Diagram
Figure 6-1 shows the clock system diagram.
The input clocks to selector shown with an arrow are set as default after reset.
Low-spped
oscillation
High-spped
oscillation
Starts oscillation after reset
CGOSCCR
fperiph
fsys
<XEN>
CGOSCCR<XTEN>
fs
CGOSCCR<WUEON>
CGOSCCR<WUPT[2:0]>
Warming-up timer
1/2
fs
fosc
1/4
Figure 6-1 Clock Block Diagram
1/8
CGOSCCR
<PLLON>
Stops after releasing reset
CGOSCCR
<WUPSEL>
1/32
PLL
1/16
fpll = fosc
CGPLLSEL
1/32
<PLLSEL>
CGSYSCR
<PRCK[2:0]>
Page 41
fc
4
T0
1/2
1/2
1/4
<SCOSEL[1:0]>
1/8
CGSYSCR
<GEAR[2:0]>
CGSYSCR
CGSYSCR<FPSEL>
TMPM333FDFG/FYFG/FWFG
fgear
【AHB-Bus I/O】
【IO-Bus I/O】
【RTC】
PeripheralI/O prescaler input
CGCKSEL
TMRB, SIO
<SYSCK>
CPU(HCLK/FCLK),
ROM, RAM, BOOT ROM
TMRB, WDT, RTC,
SIO, SBI,
Sec. counter
Systick Timer input
CPU(STCLK)
ADC conversion
clock <ADCLK>
SCOUT
ADC, PORT
fperiph
(TO peripheal I/O)
fsys
fs