TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 377

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TMPM333FDFG

Manufacturer Part Number
TMPM333FDFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
Manufacturer
Toshiba
Datasheets

Specifications of TMPM333FDFG

Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
512K
Rom Type
Flash
Ram (kbytes)
32K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
-
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM333FDFG
Manufacturer:
Toshiba
Quantity:
10 000
7
6-5
4
3
2
1
0
Bit symbol
After reset
Bit
14.3.3.10
Note 1: A read-modify-write operation cannot be porfomed.
Note 2: To set interrupt enable bits to <ENATMR>, <ENAALM> and <INTENA>, you must follow the order specified here.
INTENA
ADJUST
ENATMR
ENAALM
PAGE
Bit Symbol
Example: Clock setting/Alarm setting
Make sure not to set them at the same time (make sure that there is time lag between interrupt enable and clock/
alarm enable).To change the setting of <ENATMR> and <ENAALM>, <INTENA> must be disabled first.
RTCPAGER
RTCPAGER
INTENA
RTCPAGER(PAGE register(PAGE0/1))
7
0
R/W
R
R/W
R/W
R/W
R
R/W
Type
6
0
INTRTC
0:Disable
1:Enable
Read as 0.
[Write]
0: Don't care
1: Sets ADJUST request
Adjusts seconds. The request is sampled when the sec. counter counts up.
If the time elapsed is between 0 and 29 seconds, the sec. counter is cleared to "0".
If the time elapsed is between 30 and 59 seconds, the min. counter is carried and sec. counter is cleared
to "0".
[Read]
0: ADJUST no request
1: ADJUST requested
If "1" is read, it indicates that ADJUST is being executed. If "0" is read, it indicates that the execution
is finished.
Clock
0: Disable
1: Enable
ALARM
0: Disable
1: Enable
Read as 0.
PAGE selection
0:Selects Page0
1:Selects Page1
-
7
0
1
6
0
0
5
0
0
5
0
-
4
0
0
3
1
1
2
1
1
Page 357
ADJUST
1
0
0
4
0
0
0
0
Undefined
ENATMR
Enables Clock and alarm
Enables interrupt
Function
3
Undefined
ENAALM
2
TMPM333FDFG/FYFG/FWFG
1
0
-
PAGE
0
0

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