TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 403

• Manufacturer Part Number: TMPM333FDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
• Manufacturer: Toshiba

Specifications of TMPM333FDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 512K
• Rom Type: Flash
• Ram (kbytes): 32K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

15.2.6
configuration is applied to a communication format on a programming controller to execute the on-board pro-
gramming. Both UART (asynchronous) and I/O Interface (synchronous) modes are supported. The communi-
cation formats are shown below.
In Single Boot mode, an SIO channel is used for communications with a programming controller. The same
Interface specification
・ UART communication
・ I/O interface mode
Table 15-3 Required Pin Connections
Power supply pins
Mode-setting pin
Communication
Communication channel : SIO channel 0
Serial transfer mode : UART (asynchronous), half -duplex, LSB fast
Data length : 8 bit
Parity bits : None
STOP bits : 1 bit
Baud rate : Arbitrary baud rate
Communication channel : SIO channel 0
Serial transfer mode : I/O interface mode, full -duplex, LSB fast
Synchronization clock (SCLK0) : Input mode
Handshaking signal : PE4 configured as an output mode
Baud rate : Arbitrary baud rate
Reset pin
pins
Pins
SCLK0 (PE2)
BOOT (PH0)
RXD0 (PE1)
TXD0 (PE0)
RVDD3
DVDD3
RESET
DVSS3
AVDD
RVSS
AVSS
PE4
Page 383
UART
ο
ο
ο
ο
ο
ο
ο
ο
ο
ο
×
×
Interface
I/O Interface Mode
ο(Output mode)
ο (Input mode)
ο
ο
ο
ο
ο
ο
ο
ο
ο
ο
TMPM333FDFG/FYFG/FWFG