TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 68

• Manufacturer Part Number: TMPM333FDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
• Manufacturer: Toshiba

Specifications of TMPM333FDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 512K
• Rom Type: Flash
• Ram (kbytes): 32K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

6.6
Low Power Consumption Modes
6.6
6.6.1
6.6.2
sumption mode, specify the mode in the system control register CGSTBYCR<STBY[2:0]> and execute the WFI (Wait
For Interrupt) instruction. In this case, execute reset or generate the interrupt to release the mode. Releasing by the
interrupt requires settings in advance. See the chapter "Exceptions" for details.
Note 1: The TX03 does not offer any event for releasing the low power consumption mode. Transition to the low
Note 2: The TX03 does not support the low power consumption mode configured with the SLEEPDEEP bit in the
Low Power Consumption Modes
The TX03 has three low power consumption modes: IDLE, SLEEP and STOP. To shift to the low power con-
The features of each mode are described as follows.
mode.
operation and hold the state at that time.
chapter on each peripheral function.
ation.
IDLE mode
SLEEP mode
Only the CPU is stopped in this mode.
Each peripheral function has one bit in its control register for enabling or disabling operation in the IDLE
When the IDLE mode is entered, peripheral functions for which operation in the IDLE mode is disabled stop
The following peripheral functions can be enabled or disabled in the IDLE mode. For setting details, see the
In the SLEEP mode, the internal low-speed oscillator and real time clock can be operated.
By releasing the SLEEP mode, the device returns to the preceding mode of the SLEEP mode and starts oper-
power consumption mode by executing the WFE (Wait For Event) instruction is prohibited.
Cortex-M3 core. Setting the <SLEEPDEEP> bit of the system control register is prohibited.
Note:When PA1 (pin number 56) is configured as a debug function pin, it prevents the low power con-
・ 16-bit timer/event counter (TMRB)
・ Serial channel (SIO/UART)
・ Serial bus interface (I2C/SIO)
・ Analog Digital converter (ADC)
・ Watch dog timer (WDT)
sumption mode from being fully effective. Configure PA1 to function as a general-purpose port
if the debug function is not used.
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TMPM333FDFG/FYFG/FWFG