TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 113

• Manufacturer Part Number: TMPM333FDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
• Manufacturer: Toshiba

Specifications of TMPM333FDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 512K
• Rom Type: Flash
• Ram (kbytes): 32K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

31
30-28
27-26
25
24
23
22-20
19-18
17
16
15
14-12
11-10
9
8
7
6-4
3-2
1
After reset
After reset
After reset
After reset
bit symbol
bit symbol
bit symbol
bit symbol
Bit
7.6.3.2
−
−
−
−
−
−
−
−
−
−
−
EMCG5[2:0]
EMST5[1:0]
−
INT5EN
−
EMCG4[2:0]
EMST4[1:0]
−
Bit Symbol
CGIMCGB(CG Interrupt Mode Control Register B)
31
23
15
0
0
0
7
0
-
-
-
-
R
R/W
R
R
R/W
R
R/W
R
R
R/W
R
R/W
R
R
R/W
R
R/W
R
R
Type
30
22
14
0
0
0
6
0
Read as 0.
Write any value.
Read as 0.
Reads as undefined.
Write "0".
Read as 0.
Write any value.
Read as 0.
Reads as undefined.
Write "0".
Read as 0.
active level setting of INT5 standby clear request (101~111: setting prohibited)
000: "Low" level
001: "High" level
010: Falling edge
011: Rising edge
100: Both edges
active level of INT5 standby clear request
00: −
01: Rising edge
10: Falling edge
11: Both edges
Reads as undefined.
INT5 clear input
0:Disable
1: Enable
Read as 0.
active level setting of INT4 standby clear request (101~111: setting prohibited)
000: "Low" level
001: "High" level
010: Falling edge
011: Rising edge
100: Both edges
active level of INT4 standby clear request
00: −
01: Rising edge
10: Falling edge
11: Both edges
Reads as undefined.
-
-
EMCG5
EMCG4
29
21
13
1
1
1
5
1
-
-
Page 93
28
20
12
0
0
0
4
0
-
-
27
19
11
Function
0
0
0
3
0
-
-
EMST5
EMST4
26
18
10
0
0
0
2
0
-
-
TMPM333FDFG/FYFG/FWFG
Undefined
Undefined
Undefined
Undefined
25
17
9
1
-
-
-
-
INT5EN
INT4EN
24
16
0
0
8
0
0
0
-
-