TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 14

• Manufacturer Part Number: TMPM333FDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
• Manufacturer: Toshiba

Specifications of TMPM333FDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 512K
• Rom Type: Flash
• Ram (kbytes): 32K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

10. Serial Channel (SIO/UART)
vi
9.6 Description of Operations for Each Mode.............................................................................202
9.7 Applications using the Capture Function..............................................................................206
10.1
10.2 Difference in the Specifications of SIO Modules................................................................211
10.3 Configuration.......................................................................................................................212
10.4 Registers Description...........................................................................................................213
10.5 Operation in Each Mode......................................................................................................228
10.6 Data Format.........................................................................................................................229
10.7 Clock Control.......................................................................................................................231
10.8 Transmit/Receive Buffer and FIFO.....................................................................................239
10.9 Status Flag...........................................................................................................................240
10.10 Error Flag...........................................................................................................................240
10.11 Receive..............................................................................................................................242
9.5.6
9.5.7
9.5.8
9.5.9
9.6.1
9.6.2
9.6.3
9.6.4
9.7.1
9.7.2
9.7.3
9.7.4
10.4.1
10.4.2
10.4.3
10.4.4
10.4.5
10.4.6
10.4.7
10.4.8
10.4.9
10.4.10
10.4.11
10.4.12
10.4.13
10.6.1
10.6.2
10.6.3
10.7.1
10.7.2
10.8.1
10.8.2
10.8.3
10.10.1
10.10.2
10.10.3
10.11.1
10.11.2
10.11.3
10.6.2.1
10.6.2.2
10.7.2.1
10.7.2.2
10.11.2.1
10.11.2.2
Overview.............................................................................................................................211
Up-counter capture register (TBxUC).............................................................................................................................201
Comparators (CP0, CP1).................................................................................................................................................201
Timer Flip-flop (TBxFF0)...............................................................................................................................................201
Capture interrupt (INTCAPx0, INTCAPx1)...................................................................................................................201
16-bit Interval Timer Mode.............................................................................................................................................202
16-bit Event Counter Mode.............................................................................................................................................202
16-bit PPG (Programmable Pulse Generation) Output Mode.........................................................................................203
Timer synchronous mode.................................................................................................................................................205
One-shot pulse output triggered by an external pulse......................................................................................................206
Frequency measurement..................................................................................................................................................208
Pulse width measurement................................................................................................................................................209
Time Difference Measurement........................................................................................................................................210
Registers List in Each Channel......................................................................................................................................213
SCxEN (Enable Register)..............................................................................................................................................214
SCxBUF (Buffer Register)............................................................................................................................................215
SCxCR (Control Register).............................................................................................................................................216
SCxMOD0 (Mode Control Register 0)..........................................................................................................................217
SCxMOD1 (Mode Control Register 1)..........................................................................................................................218
SCxMOD2 (Mode Control Register 2)..........................................................................................................................219
SCxBRCR (Baud Rate Generator Control Register), SCxBRADD (Baud Rate Generator Control Register 2)..........221
SCxFCNF ( FIFO Configuration Register)...................................................................................................................223
Data Format List............................................................................................................................................................229
Parity Control.................................................................................................................................................................230
STOP Bit Length...........................................................................................................................................................230
Prescaler.........................................................................................................................................................................231
Serial Clock Generation Circuit.....................................................................................................................................235
Configuration.................................................................................................................................................................239
Transmit/Receive Buffer................................................................................................................................................239
FIFO...............................................................................................................................................................................239
SCxRFC (RX FIFO Configuration Register)..............................................................................................................224
SCxTFC (TX FIFO Configuration Register) (Note2).................................................................................................225
SCxRST (RX FIFO Status Register)...........................................................................................................................226
SCxTST (TX FIFO Status Register)............................................................................................................................227
OERR Flag...................................................................................................................................................................240
PERR Flag...................................................................................................................................................................241
FERR Flag...................................................................................................................................................................241
Receive Counter...........................................................................................................................................................242
Receive Control Unit...................................................................................................................................................242
Receive Operation........................................................................................................................................................242
Transmission
Receiving Data
Baud Rate Generator
Clock Selection Circuit
I/O interface mode
UART Mode