F84045 Asiliant Technologies, F84045 Datasheet - Page 55

• Manufacturer Part Number: F84045
• Manufacturer: Asiliant Technologies

Specifications of F84045

• Lead Free Status / Rohs Status: Not Compliant

Index
84
85
86
Revision 1.0
index
index
index
84
85
86
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
select which
WakeupB
function
function
function
EventB
Bits
EventB selection.
Setting these bits to a 1 will enable the specified occurrence to generate an EventB, which normally
restarts TimerB. EventB has no other function. TimerB, in turn, can automatically stop the CPU
clock or trigger an SMI, or both. If the bit is a 0, the specified occurrence will be ignored. The events
selected usually indicate short term system activity, and that the system should not be slowed down.
The events available are those which will often not be selected to reset TimerA, but should reset
TimerB.
IRQ0
Ext1 Pin (A multifunction pin).
INTR
Video Memory.
Keyboard
(Reserved)
Programmable I/O range 0
EventA (the output of the EventA logic)
WakeB selection.
Setting these bits to a 1 will enable the specified occurrence to generate a WakeB, which normally
restarts a stopped clock and may generate an SMI. If the bit is a 0, the specified occurrence will be
ignored. The events selected usually indicate any request for CPU usage. The events available are
those which can occur when the clock is stopped.
(Reserved)
INTR
NMI going from low to high (e.g., IOCHCK#)
SMI# low.
(Reserved)
Alternate master active (HLDA active)
External pin 1 as selected by register 8Fh
WakeA (the output of the WakeA logic)
Port Selection for Events.
Bits 0,1, and 2 of this register selects which serial, and parallel ports indicate an event when the
COM/LPT bit is set in the EventA or WakeA registers. Bits 4, 5, and 6 select which I/O ports cause
an event when the DISK bit is set in the EventA or WakeA registers.
COM1 and COM2 addresses included in COM/LPT events (3F8:3FF & 2F8:2FF)
COM3 and COM4 addresses included in COM/LPT events (3E8:3EF & 2E8:2EF)
LPT1, LPT2, and LPT3 addresses included in COM/LPT events (3BC:3BE, 378:37F, & 278:27F).
(Reserved)
Floppy ports included in DISK events (3F0:3F1 & 3F3:3F5). 3F2 is NOT included.
IDE1 ports included in DISK events (1F0:1F7, 3F6:3F7)
IDE2 ports included in DISK events (170:177, 376:377)
(Reserved)
2/10/95
wakeA event
EventA
D7
D7
D7
Description
prog IO 0
Ext 1
IDE2
D6
D6
D6
Subject to change without notice
master
IDE1
D5
D5
D5
54
keyboard
floppy
D4
D4
D4
video mem
SMI
D3
D3
D3
lpt1,2,3
INTR
NMI
D2
D2
D2
com3&4
Configuration Registers
INTR
Ext 1
Preliminary
D1
D1
D1
com1&2
IRQ0
D0
D0
D0
-
CS4041