TMP86xy48UG/FG Toshiba, TMP86xy48UG/FG Datasheet - Page 103

• Manufacturer Part Number: TMP86xy48UG/FG
• Manufacturer: Toshiba

Specifications of TMP86xy48UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): F/E
• Rom Size: 32
• Ram Size: 2K
• Driver Led: 11
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: 1
• High-speed Serial Output: 2
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 54
• Power Supply (v): 2.7 to 3.6

2.11.6 STOP Bit Length
2.11.7 Parity
2.11.8 Transmit/Receive
UARTCR1<EVEN>.
(1) Data transmit
(2) Data receive
Select a transmit stop bit length (1 or 2 bits) by UARTCR1<STBT>.
Set parity/no parity by UARTCR1<PE>; set parity type (odd- or even-numbered) by
write data in TDBUF (Transmit data buffer). Writing data in TDBUF zero-clears
UARTSR<TBEP>, transfers the data to the transmit shift register and the data are
sequentially output from the TXD pin. The data output include a one-bit start bit, stop
bits whose number is specified in UARTCR1<STBT> and a parity bit if parity addition
is specified. Select the data transfer baud rate using bits 0 to 2 in UARTCR1. When
data transmit starts, transmit buffer empty flag UARTSR<TBEP> is set to “1” and an
INTTXD interrupt is generated.
when send data are written to TDBUF, the TXD pin is fixed at high level. When
transmitting data, first read UARTSR, then write data in TDBUF. Otherwise,
UARTSR<TBEP> is not zero-cleared and transmit does not start.
data are transferred to RDBUF (Receive data buffer). At this time, the data
transmitted include a start bit and stop bit (s) and a parity bit if parity addition is
specified. When stop bit (s) are received, data only are extracted and transferred to
RDBUF (Receive data buffer). Then the receive buffer full flag UARTSR<RBFL> is set
and an INTRXD interrupt is generated. Select the data transfer baud rate using bits 0
to 2 in UARTCR1.
transferred to RDBUF (Receive data buffer) but discarded; data in the RDBUF are not
affected.
Note: When a receive operation is disabled by setting UARTCR1<RXE> bit to “0”, the
Set UARTCR1<TXE> to “1”. Read UARTSR to check UARTSR<TBEP> = “1”, then
While UARTCR1<TXE> = “0” and from when “1” is written to UARTCR1<TXE> to
Set UARTCR1<RXE> to “1”. When data are received via the RXD pin, the receive
If an overrun error (OERR) occurs when data are received, the data are not
setting becomes valid when data receive is completed. However, if a framing error
occurs in data receive, the receive-disabling setting may not become valid. if a
framing error occurs, be sure to perform a re-receive operation.
86FM48-99
TMP86FM48
2007-08-24