TMP86xy48UG/FG Toshiba, TMP86xy48UG/FG Datasheet - Page 185

• Manufacturer Part Number: TMP86xy48UG/FG
• Manufacturer: Toshiba

Specifications of TMP86xy48UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): F/E
• Rom Size: 32
• Ram Size: 2K
• Driver Led: 11
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: 1
• High-speed Serial Output: 2
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 54
• Power Supply (v): 2.7 to 3.6

Description of RAM loader mode
1.
2.
3.
4.
5.
6.
7.
Note 6: Do not send only end record after transferring of password string. If the
Note 7: When the FLASH power supply is turned off in user’s program by setting
The process of the 1st byte through the 4th byte are the same as FLASH memory
writing mode.
The receive data in the 5th byte is the RAM loader command data (60H) to write
the user’s program to RAM.
When the 5th byte is one of the operation command data shown in Table 2.19.5,
the device sends the echo back data which is the same as received operation
command data (in this case, 60H). If the 5th byte data does not correspond to the
operation command data, the device stops UART function after sending 3 bytes of
operation command error code: (63H).
The process of the 7th byte through the m’th byte are the same as FLASH memory
writing mode.
The receive data in the m’th + 1 through n'th − 2byte are received as binary data in
Intel Hex format. No received data are echoed back to the controller.
The data which is not the start mark (3AH for “:”) in Intel Hex format is ignored
and does not send an error code to the controller until the device receives the start
mark. After receiving the start mark, the device receives the data record, that
consists of length of data, address, record type, writing data and checksum. After
receiving the checksum of data record, the device waits the start mark data (3AH)
again. The data of data record is written to specified RAM by the receiving data.
Since after receiving an end record, the device starts to calculate the SUM, the
controller should wait the SUM after sending the end record. If receive error or
Intel Hex format error occurs, the UART function of TMP86FM48 stops without
returning error code to the controller.
order of the upper byte and the lower byte. For details on how to calculate the
SUM, refer to 2.19.9 “Checksum (SUM)”. The SUM calculation is performed after
detecting the end record, but the calculation is not executed when receive error or
Intel Hex format error has occurred.
The SUM is calculated by the data written to RAM, but the length of data, address,
record type and checksum in Intel Hex format are not included in SUM.
The boot program jumps to the first address that is received as data in Intel Hex
format after sending the SUM to the controller.
The n’th − 1 and the n’th bytes are the SUM value that is sent to the controller in
occurs, the TMP86FM48 should be reset by
TMP86FM48 receives the end record only after reception of password string, it
does not operate correctly.
EEPCR<MNPWDW>, be sure to disable the watchdog timer (WDT) or to clear
the binary counter of WDT immediately before.
86FM48-181
RESET
pin input.
TMP86FM48
2007-08-24