TMP86xy48UG/FG Toshiba, TMP86xy48UG/FG Datasheet - Page 84

• Manufacturer Part Number: TMP86xy48UG/FG
• Manufacturer: Toshiba

Specifications of TMP86xy48UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): F/E
• Rom Size: 32
• Ram Size: 2K
• Driver Led: 11
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: 1
• High-speed Serial Output: 2
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 54
• Power Supply (v): 2.7 to 3.6

TC2CK
Note: When fc is selected as the source clock in timer mode, it is used at warm-up for switching from
000
001
010
011
100
101
2.8.3
SLOW2 mode to NORMAL2 mode.
Resolution
524.29 ms
512.00 µs
16.00 µs
30.52 µs
0.50 µs
Function
(1) Timer mode
Table 2.8.1 Source Clock (Internal clock) for Timer/Counter 2 (at fc = 16 MHz)
−
The timer/counter 2 has three operating modes: timer, event counter and window modes.
DV7CK = 0
compared with the contents of up counter. If a match is found, a timer/counter 2
interrupt (INTTC2) is generated, and the counter is cleared. Counting up is resumed
after the counter is cleared.
When fc is selected for source clock at SLOW2 mode, lower 11-bits of TC2DR are
ignored and generated a interrupt by matching upper 5-bits. Though, in this situation,
it is necessary to set TC2DRH only.
In this mode, the internal clock is used for counting up. The contents of TC2DR are
NORMAL1/2, IDLE1/2 Mode
Example: Sets the timer mode with source clock fc/2
Maximum
32.77 ms
33.55 s
Setting
9.54 h
1.05 s
2.00 s
Time
−
(at fc = 16 MHz).
Resolution
LDW
DI
SET
EI
LD
LD
16.00 µs
30.52 µs
0.98 ms
0.50 µs
1.00 s
−
DV7CK = 1
(TC2DR), 0C350H
(EIRE). 4
(TC2CR), 00001100B
(TC2CR), 00101100B
86FM48-80
Maximum
32.77 ms
1.07 min
18.20 h
Setting
1.05 s
2.00 s
Time
−
62.5 ns (Note)
Resolution
0.98 ms
1.00 s
−
−
−
SLOW1/2 Mode
3
[Hz] and generates an interrupt every 25 ms
;
;
;
;
;
;
Maximum
1.07 min
18.20 h
Setting
Sets TC2DR (25 ms ÷ 2
IMF = “0”
Enables INTTC2 interrupt
IMF = “1”
TC2CK ← “011”, TC2M ← “0”
Starts TC2
Time
−
−
−
−
Resolution
0.98 ms
1.00 s
SLEEP1/2 Mode
−
−
−
−
3
TMP86FM48
/fc = C350H)
2007-08-24
Maximum
1.07 min
18.20 h
Setting
Time
−
−
−
−