TMP86xy48UG/FG Toshiba, TMP86xy48UG/FG Datasheet - Page 106

• Manufacturer Part Number: TMP86xy48UG/FG
• Manufacturer: Toshiba

Specifications of TMP86xy48UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): F/E
• Rom Size: 32
• Ram Size: 2K
• Driver Led: 11
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: 1
• High-speed Serial Output: 2
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 54
• Power Supply (v): 2.7 to 3.6

Transmit clock
UARTSR<TBEP>
UARTSR<TEND>
INTTXD
Shift register
TXD pin
TDBUF
Shift register
TXD pin
UARTSR<TBEP>
INTTXD
(5) Transmit data buffer empty
(6) Transmit end flag
***1xx
*****1
is, when data in TDBUF are transferred to the transmit shift register and data
transmit starts, transmit data buffer empty flag UARTSR<TBEP> is set to “1”. The
UARTSR<TBEP> is cleared to “0” when the TDBUF is written after reading the
UARTSR.
transmit end flag UARTSR<TEND> is set to “1”. The UARTSR<TEND> is cleared to
“0” the data transmit is stated after writing the TDBUF.
xxxx
When no data is in the transmit buffer TDBUF, UARTSR<TBEP> is set to “1”, that
When data are transmitted and no data is in TDBUF (UARTSR<TBEP> = “1”),
****1x
Figure 2.11.10 Generation of Transmit Buffer Empty
1xxxx0
Figure 2.11.9 Generation of Transmit Buffer Empty
Start
Data write
*****1
Stop
yyyy
*1xxxx
Bit0
86FM48-102
Data writing to TDBUF
Final bit
****1x
*****1
Stop
1yyyy0
After reading UARTSR,
writing TDBUF clears
TBEP.
Start
1yyyy0
Start
TMP86FM48
Data write
2007-08-24
zzzz
*1yyyy
Bit0