TMP86xy48UG/FG Toshiba, TMP86xy48UG/FG Datasheet - Page 153

• Manufacturer Part Number: TMP86xy48UG/FG
• Manufacturer: Toshiba

Specifications of TMP86xy48UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): F/E
• Rom Size: 32
• Ram Size: 2K
• Driver Led: 11
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: 1
• High-speed Serial Output: 2
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 54
• Power Supply (v): 2.7 to 3.6

2.16 FLASH Memory
2.16.1
2.16.2
Data Memory
Program Memory
Outline
FFFFH). Of these bytes, 512 bytes (Address 8000H to 81FFH) can be used as data memory.
When these 512 bytes (Address 8000H to 81FFH) are used as data memory, the 32256 bytes
(Address 8200H to FFFFH) can be used as program memory. The writing to FLASH
memory is controlled by FLASH control register (EEPCR), FLASH status register (EEPSR)
and FLASH write emulate time control register (EEPEVA).
Conditions for Accessing the FLASH Areas
The following tables shows FLASH are access conditions.
Note 1: “MCU mode” shows NORMAL1/2 and SLOW1/2 modes.
Note 2: “Serial PROM mode” shows the FLASH controlling mode. For details, refer to “2.19
Note 3: “Fetch” means reading operation of FLASH data as an instruction by CPU.
The TMP86FM48 incorporates 32768 bytes of FLASH memory (Address 8000H to
The FLASH memory of the TMP86FM48 features:
The conditions for accessing the FLASH areas vary depending on each operation mode.
•
•
•
•
Serial PROM mode”.
The FLASH memory is constructed of 512 pages FLASH memory and one page size
The TMP86FM48 incorporates a 64-byte temporary data buffer. The data written
The FLASH control circuit incorporates an oscillator dedicated to the FLASH. So
Controlling the power for the FLASH control circuit (regulator and voltage step-up
is 64 bytes (512 pages × 64 bytes = 32768 bytes).
to FLASH memory is temporarily stored in this data buffer. After 64 bytes data
have been written to the temporary data buffer, the writing to FLASH memory
automatically starts by page writing (The 64 bytes data are written to specified
page of FLASH simultaneously). At the same time, page-by-page erasing occurs
automatically. So, it is unnecessary to erase individual pages in advance.
FLASH writing time is independent of the system clock frequency (fc). In addition,
because an FLASH control circuit controls writing time for each FLASH memory
cell, the writing time varies in each page (Typically 4 ms per page).
circuit) achieves low power consumption if the FLASH is not in use (Example:
When the program is executed in RAM area).
8000H to 81FFH
8200H to FFFFH
Table 2.16.1 FLASH Area Access Conditions
Area
MCU mode (Note 1)
86FM48-149
Read/fetch only
Write/read/fetch
Operation Mode
(Note3)
Serial PROM mode (Note 2)
Write/read/fetch supported
supported
TMP86FM48
2007-08-24