TMP86xy48UG/FG Toshiba, TMP86xy48UG/FG Datasheet - Page 107

• Manufacturer Part Number: TMP86xy48UG/FG
• Manufacturer: Toshiba

Specifications of TMP86xy48UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): F/E
• Rom Size: 32
• Ram Size: 2K
• Driver Led: 11
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: 1
• High-speed Serial Output: 2
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 54
• Power Supply (v): 2.7 to 3.6

2.12 Serial Bus Interface (SBI-ver. D)
2.12.1 Configuration
2.12.2 Control
canceller
Noise
system by Philips).
serial bus interface pins are also used for the P5 port. When used for serial bus interface pins,
set the P5 output latches of these pins to “1”. When not used as serial bus interface pins, the P5
port is used as a normal I/O port.
Note 1: When P5 is used as serial bus interface pins, P50 and P51 should be set as a sink open
Note 2: The serial bus interface can be used only in NORMAL1/2 and IDLE1/2 mode. It can not be
Note 3: The I
SBI control register B/
SBI status register
The TMP86FM48 has a 1-channel serial bus interface which employs an I
The serial interface is connected to external devices through P51 (SDA) and P50 (SCL). The
fc/4
operation status.
SBICRB/
The following registers are used for control the serial bus interface and monitor the
SBISR
drain output by clearing P5OUTCR to “0”.
used in IDLE0, SLOW1/2 and SLEEP0/1/2 mode.
the high-speed mode can not be used.
•
•
•
•
•
I
Divider
control
2
clock
sync.
C bus
+
Serial bus interface control register A (SBICRA)
Serial bus interface control register B (SBICRB)
Serial bus interface data buffer register (SBIDBR)
I
Serial bus interface status register (SBISR)
2
2
C of TMP86FM48 can be used only in the Standard mode of I
C bus address register (I2CAR)
I
address register
2
C bus
Transfer
control
circuit
I2CAR
Figure 2.12.1 Serial Bus Interface (SBI)
SBI data
buffer register
86FM48-103
INTSBI interrupt request
SBIDBR
register
Shift
SBI control register A
SBICRA
I
control
2
C bus
data
canceller
Noise
2
C. The fast mode and
SCL
control
SDA
output
Input/
2
TMP86FM48
C bus (A bus
2007-08-24
(SDA)
(SCL)
P50
P51