TMP86xy48UG/FG Toshiba, TMP86xy48UG/FG Datasheet - Page 110

• Manufacturer Part Number: TMP86xy48UG/FG
• Manufacturer: Toshiba

Specifications of TMP86xy48UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): F/E
• Rom Size: 32
• Ram Size: 2K
• Driver Led: 11
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: 1
• High-speed Serial Output: 2
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 54
• Power Supply (v): 2.7 to 3.6

Serial Bus Interface Control Register B
Serial Bus Interface Status Register
SBICRB
(1FDCH)
SBISR
(1FDCH)
Figure 2.12.4 Serial Bus Interface Control Register B and Serial Bus Interface Status Register
Note 1: Switch a mode to port after confirming that the bus is free.
Note 2: Switch a mode to I
Note 3: SBICRB has write-only register and must not be used with any of read-modify-write instructions such as bit
Note 4: When the SWRST (Bit1, 0 in SBICRB) is written to “01”, “10” in I
SWRST1
SWRST0 Software reset start bit
MST
MST
SBIM
MST
TRX
PIN
MST
TRX
AAS
AD0
LRB
7
BB
7
PIN
BB
AL
manipulation, etc.
In this case, the SBICRA, I2CAR and SBISR registers are initialized and the bits of SBICRB except the
SBIM (Bit3, 2 in SBICRB) are also initialized.
TRX
TRX
Transmitter/receiver selection
Start/stop generation
Cancel interrupt service request
Serial bus interface operating
mode selection
Master/slave selection
Master/slave selection status
monitor
Transmitter/receiver selection
status monitor
Bus status monitor
Interrupt service requests
status monitor
Arbitration lost detection
monitor
Slave address match detection
monitor
“GENERAL CALL” detection
monitor
Last received bit monitor
6
6
BB
BB
5
5
2
C bus mode after confiming that the port is high level.
PIN
PIN
4
4
AL
3
3
86FM48-106
SBIM
00: Port mode (Serial bus interface output disable)
01: Reserved
10: I
11: Reserved
Software reset starts by first writing “10” and next writing “01”
0: Slave
1: Master
0: Receiver
1: Transmitter
0: Generate a stop condition when MST, TRX and PIN are “1”
1: Generate a start condition when MST, TRX and PIN are “1”
0: −
1: Cancel interrupt service request
0: Slave
1: Master
0: Receiver
1: Transmitter
0: Bus free
1: Bus busy
0: Requesting interrupt service
1: Releasing interrupt service request
0: −
1: Arbitration lost detected
0: Not detect slave address match or “GENERAL CALL”
1: Detect slave address match or “GENERAL CALL”
0: Not detect “GENERAL CALL”
1: Detect “GENERAL CALL”
0: Last receive bit is “0”
1: Last receiv bit is “1”
2
AAS
C bus mode
2
2
SWRST1SWRST0 (Initial value: 0001 0000)
AD0
1
1
LRB
0
0
2
C bus mode, software reset is occurred.
(Initial value: 0001 0000)
TMP86FM48
2007-08-24
Read
Write
only
only