TMP86xy48UG/FG Toshiba, TMP86xy48UG/FG Datasheet - Page 60

• Manufacturer Part Number: TMP86xy48UG/FG
• Manufacturer: Toshiba

Specifications of TMP86xy48UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): F/E
• Rom Size: 32
• Ram Size: 2K
• Driver Led: 11
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: 1
• High-speed Serial Output: 2
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 54
• Power Supply (v): 2.7 to 3.6

2.2.7
*: Don’t care.
Port P7 (P77 to P70)
one-bit unit. Port P7 is also used as an analog input. Input/output mode is specified by the
P7 control register (P7CR1). P7 port input is controlled by the input control register
(P7CR2).
P7CR1 is cleared to “0”.
“1”. Table 2.2.3 shows a P7 state.
Port P7 is an 8-bit input/output port which can be configured as an input or an output in
When used as an output port, respective P7CR1 should be set to “1”.
When used as an input port, respective P7CR1 should be cleared to “0” and respective
P7CR2 should be set to “1”.
When used as an analog input, respective P7CR2 should be cleared to “0” after respective
During reset, the P7CR1 and P7DR are initialized to “0”, and the P7CR2 is initialized to
P7CR1
0
0
1
1
P7CR2
0
1
*
*
Table 2.2.3 P7 Port State
P7DR
86FM48-56
*
*
0
1
“0” (Output latch)
“1” (Output latch)
P7DR Read
Terminal input
“0”
Output
High-Z
High-Z
High
Low
Output mode
Output mode
Input mode
Remark
TMP86FM48
−
2007-08-24