st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 135

• Manufacturer Part Number: st7pmc2s6
• Description: 8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
• Manufacturer: STMicroelectronics

ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
10.4.6
Note:
Caution:
Figure 60. Single master/multiple slave configuration
Low power modes
Table 54.
Using the SPI to wake up the device from Halt mode
In slave configuration, the SPI is able to wake up the device from Halt mode through a SPIF
interrupt. The data received is subsequently read from the SPIDR register when the
software is running (interrupt vector fetch). If multiple data transfers have been performed
before software clears the SPIF bit, then the OVR bit is set by hardware.
When waking up from Halt mode, if the SPI remains in slave mode, it is recommended to
perform an extra communications cycle to bring the SPI from Halt mode state to normal
state. If the SPI exits from slave mode, it returns to normal state immediately.
The SPI can wake up the device from Halt mode only if the slave select signal (external SS
pin or the SSI bit in the SPICSR register) is low when the device enters Halt mode. So, if
slave selection is configured as external (see
sure the master drives a low level on the SS pin when the slave enters Halt mode.
5V
Mode
Wait
Halt
SCK
SS
MOSI
SCK
MOSI
Slave device
Effect of low power modes on SPI
Master
device
No effect on SPI.
SPI interrupt events cause the device to exit from Wait mode.
SPI registers are frozen.
In Halt mode, the SPI is inactive. SPI operation resumes when the device is
woken up by an interrupt with ‘exit from Halt mode’ capability. The data received
is subsequently read from the SPIDR register when the software is running
(interrupt vector fetching). If several data are received before the wake-up event,
then an overrun error is generated. This error can be detected after the fetch of
the interrupt routine that woke up the device.
MISO
MISO
SS
SCK
MOSI
Slave device
MISO
SS
Slave select management on page
Description
SCK
MOSI
Slave device
MISO
SS
On-chip peripherals
SCK
MOSI
Slave device
MISO
129), make
SS
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