st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 296

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st7pmc2s6

Manufacturer Part Number
st7pmc2s6
Description
8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
Manufacturer
STMicroelectronics
Datasheet
On-chip peripherals
10.7.6
Note:
10.7.7
10.7.8
296/371
Low power modes
The op-amp can be disabled by resetting the OAON bit. This feature allows reduced power
consumption when the amplifier is not used.
Table 169. Effect of low power modes on op-amp
Interrupts
None.
Register description
Control/status register (OACSR)
Table 170. OACSR register description
OASCR
Bit
CMPOVR
7
6
5
4
RO
7
CMPOVR
OFFCMP
AVGCMP
OAON
Name
Mode
Wait
Halt
OFFCMP
R/W
6
Compensation completed
Offset compensation
Average compensation
Amplifier on
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
This read-only bit contains the offset compensation status.
0: No offset compensation if OFFCMP = 0, or Offset compensation cycle not
1: Offset compensation completed if OFFCMP = 1
0: Reset offset compensation values
1: Request to start offset compensation
0: One-shot offset compensation
1: Average offset compensation over 16 times
0: Op-amp powered off
1: Op-amp on
completed if OFFCMP = 1
Op-amp disabled
After wake-up from Halt mode, the op-amp requires a stabilization time (see
Section 12: Electrical
No effect on op-amp
AVGCMP
R/W
5
OAON
R/W
4
characteristics)
HIGH
GAIN
R/W
Function
3
Description
2
Reset value: 0000 0000 (00h)
Reserved
1
-
0

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