st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 175

• Manufacturer Part Number: st7pmc2s6
• Description: 8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
• Manufacturer: STMicroelectronics

ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
Table 71.
Figure 73. LSF bit set and clear
Bit
3
2
1
0
LHDM
Name
LHDF
LHIE
LSF
SCICR3 register description (continued)
LIN header detection method
LIN header interrupt enable
LIN header detection flag
LIN synch field state
This bit is set and cleared by software. It is only usable in LIN slave mode. It
enables the header detection method. In addition if the RWU bit in the SCICR2
register is set, the LHDM bit selects the wake-up method (replacing the WAKE
bit).
0: LIN synch break detection method
1: LIN identifier field detection method
This bit is set and cleared by software. It is only usable in LIN slave mode.
0: LIN header interrupt is inhibited
1: An SCI interrupt is generated whenever LHDF = 1
This bit is set by hardware when a LIN header is detected and cleared by a
software sequence (an access to the SCISR register followed by a read of the
SCICR3 register). It is only usable in LIN slave mode.
0: No LIN header detected
1: LIN header detected
Note: The header detection method depends on the LHDM bit:
- If LHDM = 0, a header is detected as a LIN synch break
- If LHDM = 1, a header is detected as a LIN Identifier, meaning that a LIN synch
This bit indicates that the LIN synch field is being analyzed. It is only used in LIN
slave mode. In auto synchronization mode (LASE bit = 1), when the SCI is in the
LIN synch field state it waits or counts the falling edges on the RDI line.
It is set by hardware as soon as a LIN synch break is detected and cleared by
hardware when the LIN synch field analysis is finished (see
can also be cleared by software to exit LIN Synch state and return to idle mode.
0: The current character is not the LIN synch field
1: LIN synch field state (LIN synch field undergoing analysis)
break field + a LIN synch field + a LIN identifier field have been consecutively
received.
11 dominant bits
LSF bit
LIN synch
break
LIN synch
field
Function
Parity bits
Identifier
field
On-chip peripherals
Figure
73). This bit
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