st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 268

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st7pmc2s6

Manufacturer Part Number
st7pmc2s6
Description
8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
Manufacturer
STMicroelectronics
Datasheet
On-chip peripherals
268/371
Control register B (MCRB)
1. Preload bits, new value taken into account at the next C event (in normal mode) or when a value is written
Table 131. MCRB register description
MCRB
2:0
Bit
Reserved
7
6
5
4
3
in the MPHST register when in direct access mode. For more details refer to the description of the DAC bit
in
updated at the same time.
7
Control register A (MCRA) on page
OS[1:0]
-
Name
HDM
OS2,
SDM
OCV
CPB
-
Reserved, must be kept at reset value.
Compare bit for zero-crossing detection
Hardware demagnetization event mask bit
Simulated demagnetization event mask bit
Over current handling in voltage mode
Operating output mode selection bits
CPB
R/W
0: Zero crossing detection on falling edge
1: Zero crossing detection on rising edge
0: Hardware demagnetization disabled
1: Hardware demagnetization enabled
0: Simulated demagnetization disabled
1: Simulated demagnetization enabled
0: Overcurrent protection is OFF
1: Overcurrent protection is ON
This bit acts as described in
These bits are used to define the various PWM output configurations. Refer to the
step behavior diagrams
behavior/sensorless
PWM mode when DAC =
6
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
(1)
HDM
R/W
5
(1)
265. The use of a preload register allows all the registers to be
mode,
SDM
(Figure 110
R/W
1.
4
Table 134: PWM mode when SR =
Table
(1)
132.
Function
and
OCV
R/W
3
Figure
111),
OS2
R/W
2
Table 133: Step
Reset value: 0000 0000 (00h)
(1)
1, and
1
OS[1:0]
R/W
Table 135:
0

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