st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 204

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st7pmc2s6

Manufacturer Part Number
st7pmc2s6
Description
8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
Manufacturer
STMicroelectronics
Datasheet
On-chip peripherals
204/371
Specific applications can require sampling for the Z event detection only during the ON time
of the PWM signal. This can happen when the PWM signal is applied only on the low side
switches for Z event detection. In this case, during the OFF time of the PWM signal, the
phase voltage is tied to the application voltage V and no back-EMF signal can be seen.
During the ON time of the PWM signal, the phase voltage can be compared to the neutral
point voltage and the Z event can be detected. Therefore, it is possible to add a
programmable delay before sampling (which is normally done when the PWM signal is
switched ON) to perform the sampling during the ON time of the PWM signal. This delay is
set with the DS [3:0] bits in the MCONF register.
Table 91.
1. Times are indicated for 4 MHz f
As soon as a delay is set in the DS[3:0] bits, the minimum OFF time for the PWM signal is
no longer required and it is automatically set to 0µs in current mode in the internal sampling
clock and a true 100% duty cycle can be set in the 12-bit PWM generator compare U
register if needed.
Depending on the frequency and the duty cycle of the PWM signal, the delay inserted
before sampling could cause it sample the signal OFF time instead of the ON time. In this
case an interrupt can be generated and the sample is not taken into account. When a
sample occurs outside the PWM signal ON time, the SOI bit in the MCONF register is set
and an interrupt request is generated if the SOM bit is set in the MCONF register. This
interrupt is enabled only if a delay value has been set in the DS[3:0] bits. In this case, the
sampling is done at the PWM frequency but only during the ON time of the PWM signal.
Figure 85
is added.
DS3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
and
Delay length before sampling
Figure 86
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
DS2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
show in detail the generation of the sampling order when the delay
PERIPH
DS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
.
(1)
DS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
No delay added. Sample during T
Delay added to sample at T
12.5 µs
17.5 µs
22.5 µs
27.5 µs
32.5 µs
37.5 µs
2.5 µs
7.5 µs
10 µs
15 µs
20 µs
25 µs
30 µs
35 µs
5 µs
ON
OFF

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