st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 242

• Manufacturer Part Number: st7pmc2s6
• Description: 8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
• Manufacturer: STMicroelectronics

On-chip peripherals
Note:
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MPHST phase state register
A preload register enables software to asynchronously update the channel configuration for
the next step (during the previous commutation interrupt routine for example): the OO[5:0]
bits in the MPHST register are copied to the phase register on a C event.
Table 107. Output state
Direct access to the phase register is also possible when the DAC bit in the MCRA register
is set.
In direct access mode (DAC bit is set in MCRA register):
1.
2.
3.
Table 108. DAC and MOE bit meaning
1. The reset state of the outputs can be either high impedance, low or high state depending on the
The polarity register is used to match the polarity of the power drivers keeping the same
control logic and software. If one of the OPx bits in the MPOL register is set, this means the
switch x is ON when MCOx is V
Each output status depends also on the momentary state of the PWM, its group (low or
high), and the peripheral state.
PWM features
The outputs can be split in two PWM groups in order to differentiate the high side and the
low side switches. This output property can be programmed using the OE[5:0] bits in the
MPAR register.
Table 109. Meaning of the OE[5:0] bits
corresponding option bit.
MOE bit
A C event is generated as soon as there is a write access to OO[5:0] bits in MPHST
register.
The PWM application is selected by the OS0 bit in the MCRB register.
Regardless of the value of the CKE bit in the MCRA register, the MTIM Clock is
disabled and D and Z events are not detected.
0
1
1
OP[5:0] bit
0
0
1
1
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
DAC bit
OE[5:0]
0
1
x
0
1
Reset state
Standard running mode
MPHST register value (depending on MPOL, MPAR register values
and PWM setting). See
DD
.
(1)
OO[5:0] bit
0
1
0
1
Table
Effect on output
155.
Channel group
High channel
Low channel
0-(PWM allowed)
1-(PWM allowed)
MCO[5:0] pin
1 (OFF)
0 (OFF)