st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 324

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st7pmc2s6

Manufacturer Part Number
st7pmc2s6
Description
8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
Manufacturer
STMicroelectronics
Datasheet
Electrical characteristics
12.6
12.6.1
324/371
Figure 138. PLL and clock detector signal start up sequence
1. Lock does not go low without resetting the PLLEN bit.
2. Before setting the CKSEL bit by software in order to switch to the PLL clock, a period of t
3. 2 clock cycles are missing after CKSEL = 1.
4. CKSEL bit must be set before enabling the CSS interrupt (CSSIE
Memory characteristics
RAM and hardware registers
Table 203. RAM and hardware registers
1. Minimum V
Symbol
V
elapsed.
hardware registers (only in Halt mode). Not tested in production.
CKSEL
OSC1
(or OSCIN)
PLLEN
(PLL and CKD)
PLL CLOCK
LOCK
f
CSSD
CSSIE
INTERRUPT
RM
CLK
(2)
(4)
Data retention mode
DD
supply voltage without losing data stored in RAM (in Halt mode or under RESET) or in
Parameter
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
t
setup
(1)
t
lock
OSCI (or OSCIN clock)
Halt mode (or reset)
Conditions
16 MHz
(3)
PLL clock
=
1).
Min
1.6
f
VCO
t
hold
Typ
= 6 MHz
(1)
lock
must have
Max
Unit
V

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